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VME64x core
Commits
710dbc16
Commit
710dbc16
authored
Jun 04, 2020
by
Tristan Gingold
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g_VME_2e generic is false by default. Adjust component and testbench.
parent
b86ede3d
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4 changed files
with
14 additions
and
10 deletions
+14
-10
vme64x_core.vhd
hdl/rtl/vme64x_core.vhd
+3
-2
vme64x_pkg.vhd
hdl/rtl/vme64x_pkg.vhd
+1
-0
xvme64x_core.vhd
hdl/rtl/xvme64x_core.vhd
+2
-1
top_tb.vhd
hdl/testbench/simple_tb/top_tb.vhd
+8
-7
No files found.
hdl/rtl/vme64x_core.vhd
View file @
710dbc16
----------------------------------------------------------------
----------------------------------------------------------------
-- This file was automatically generated by vhdl-unwrap for
-- This file was automatically generated by vhdl-unwrap for
-- entity xvme64x_core.
-- entity xvme64x_core.
-- DO NOT EDIT.
-- DO NOT EDIT.
----------------------------------------------------------------
----------------------------------------------------------------
...
@@ -16,6 +16,7 @@ entity vme64x_core is
...
@@ -16,6 +16,7 @@ entity vme64x_core is
g_ENABLE_CR_CSR
:
boolean
:
=
true
;
g_ENABLE_CR_CSR
:
boolean
:
=
true
;
g_USER_CSR_EXT
:
boolean
:
=
false
;
g_USER_CSR_EXT
:
boolean
:
=
false
;
g_VME32
:
boolean
:
=
true
;
g_VME32
:
boolean
:
=
true
;
g_VME_2e
:
boolean
:
=
False
;
g_WB_GRANULARITY
:
t_wishbone_address_granularity
;
g_WB_GRANULARITY
:
t_wishbone_address_granularity
;
g_MANUFACTURER_ID
:
std_logic_vector
(
23
downto
0
);
g_MANUFACTURER_ID
:
std_logic_vector
(
23
downto
0
);
g_BOARD_ID
:
std_logic_vector
(
31
downto
0
);
g_BOARD_ID
:
std_logic_vector
(
31
downto
0
);
...
@@ -117,6 +118,7 @@ begin
...
@@ -117,6 +118,7 @@ begin
g_VME32
=>
g_VME32
,
g_VME32
=>
g_VME32
,
g_WB_GRANULARITY
=>
g_WB_GRANULARITY
,
g_WB_GRANULARITY
=>
g_WB_GRANULARITY
,
g_WB_MODE
=>
CLASSIC
,
g_WB_MODE
=>
CLASSIC
,
g_VME_2e
=>
g_VME_2e
,
g_MANUFACTURER_ID
=>
g_MANUFACTURER_ID
,
g_MANUFACTURER_ID
=>
g_MANUFACTURER_ID
,
g_BOARD_ID
=>
g_BOARD_ID
,
g_BOARD_ID
=>
g_BOARD_ID
,
g_REVISION_ID
=>
g_REVISION_ID
,
g_REVISION_ID
=>
g_REVISION_ID
,
...
@@ -205,4 +207,3 @@ begin
...
@@ -205,4 +207,3 @@ begin
user_cr_addr_o
=>
user_cr_addr_o
,
user_cr_addr_o
=>
user_cr_addr_o
,
user_cr_data_i
=>
user_cr_data_i
);
user_cr_data_i
=>
user_cr_data_i
);
end
unwrap
;
end
unwrap
;
hdl/rtl/vme64x_pkg.vhd
View file @
710dbc16
...
@@ -199,6 +199,7 @@ package vme64x_pkg is
...
@@ -199,6 +199,7 @@ package vme64x_pkg is
g_VME32
:
boolean
:
=
True
;
g_VME32
:
boolean
:
=
True
;
g_VME_2e
:
boolean
:
=
True
;
g_VME_2e
:
boolean
:
=
True
;
g_WB_GRANULARITY
:
t_wishbone_address_granularity
;
g_WB_GRANULARITY
:
t_wishbone_address_granularity
;
g_WB_MODE
:
t_wishbone_interface_mode
:
=
CLASSIC
;
g_MANUFACTURER_ID
:
std_logic_vector
(
23
downto
0
);
g_MANUFACTURER_ID
:
std_logic_vector
(
23
downto
0
);
g_BOARD_ID
:
std_logic_vector
(
31
downto
0
);
g_BOARD_ID
:
std_logic_vector
(
31
downto
0
);
...
...
hdl/rtl/xvme64x_core.vhd
View file @
710dbc16
...
@@ -64,7 +64,8 @@ entity xvme64x_core is
...
@@ -64,7 +64,8 @@ entity xvme64x_core is
g_VME32
:
boolean
:
=
True
;
g_VME32
:
boolean
:
=
True
;
-- If True, supports 2eSST.
-- If True, supports 2eSST.
g_VME_2e
:
boolean
:
=
True
;
-- Do not forget to assign g_DECODER if set to True.
g_VME_2e
:
boolean
:
=
False
;
-- Address granularity on the WB bus. Value can be:
-- Address granularity on the WB bus. Value can be:
-- WORD: VME address bits 31:2 are translated to WB address bits 29:0,
-- WORD: VME address bits 31:2 are translated to WB address bits 29:0,
...
...
hdl/testbench/simple_tb/top_tb.vhd
View file @
710dbc16
...
@@ -270,6 +270,7 @@ begin
...
@@ -270,6 +270,7 @@ begin
g_DECODE_AM
=>
(
g_SCENARIO
/=
9
),
g_DECODE_AM
=>
(
g_SCENARIO
/=
9
),
g_WB_GRANULARITY
=>
WORD
,
g_WB_GRANULARITY
=>
WORD
,
g_USER_CSR_EXT
=>
false
,
g_USER_CSR_EXT
=>
false
,
g_VME_2e
=>
True
,
g_MANUFACTURER_ID
=>
c_CERN_ID
,
g_MANUFACTURER_ID
=>
c_CERN_ID
,
g_BOARD_ID
=>
c_SVEC_ID
,
g_BOARD_ID
=>
c_SVEC_ID
,
...
@@ -1427,7 +1428,7 @@ begin
...
@@ -1427,7 +1428,7 @@ begin
report
"incorrect MBLT data 64"
severity
error
;
report
"incorrect MBLT data 64"
severity
error
;
assert
err_8000
=
0
assert
err_8000
=
0
report
"no 0x8000 error expected"
severity
error
;
report
"no 0x8000 error expected"
severity
error
;
when
7
=>
when
7
=>
-- Delayed DS
-- Delayed DS
...
@@ -1511,18 +1512,18 @@ begin
...
@@ -1511,18 +1512,18 @@ begin
when
11
=>
when
11
=>
-- Test MBLT prefetching
-- Test MBLT prefetching
-- Set ADER
-- Set ADER
write8_conf
(
x"7_ff63"
,
x"64"
);
write8_conf
(
x"7_ff63"
,
x"64"
);
write8_conf
(
x"7_ff6f"
,
c_AM_A32_MBLT
&
"00"
);
write8_conf
(
x"7_ff6f"
,
c_AM_A32_MBLT
&
"00"
);
write8_conf
(
x"7_ff73"
,
x"00"
);
write8_conf
(
x"7_ff73"
,
x"00"
);
write8_conf
(
x"7_ff77"
,
x"30"
);
write8_conf
(
x"7_ff77"
,
x"30"
);
write8_conf
(
x"7_ff7f"
,
c_AM_A24
&
"00"
);
write8_conf
(
x"7_ff7f"
,
c_AM_A24
&
"00"
);
-- Enable card
-- Enable card
write8_conf
(
x"7_fffb"
,
b"0001_0000"
);
write8_conf
(
x"7_fffb"
,
b"0001_0000"
);
assert
err_8000
=
0
assert
err_8000
=
0
report
"no 0x8000 error expected"
severity
error
;
report
"no 0x8000 error expected"
severity
error
;
read64_mblt
(
x"64_00_87_e0"
,
c_AM_A32_MBLT
,
v64
(
0
to
3
));
read64_mblt
(
x"64_00_87_e0"
,
c_AM_A32_MBLT
,
v64
(
0
to
3
));
...
@@ -1537,7 +1538,7 @@ begin
...
@@ -1537,7 +1538,7 @@ begin
report
"incorrect MBLT data 64"
severity
error
;
report
"incorrect MBLT data 64"
severity
error
;
assert
err_8000
=
0
assert
err_8000
=
0
report
"no 0x8000 error expected"
severity
error
;
report
"no 0x8000 error expected"
severity
error
;
read64_mblt
(
x"64_00_c0_00"
,
c_AM_A32_MBLT
,
v64
(
0
to
3
));
read64_mblt
(
x"64_00_c0_00"
,
c_AM_A32_MBLT
,
v64
(
0
to
3
));
report
"at 00: "
&
hex8
(
v64
(
0
)(
63
downto
32
));
report
"at 00: "
&
hex8
(
v64
(
0
)(
63
downto
32
));
report
"at 08: "
&
hex8
(
v64
(
0
)(
31
downto
0
));
report
"at 08: "
&
hex8
(
v64
(
0
)(
31
downto
0
));
...
@@ -1548,7 +1549,7 @@ begin
...
@@ -1548,7 +1549,7 @@ begin
x"c0_00_30_04_c0_00_30_05"
,
x"c0_00_30_04_c0_00_30_05"
,
x"c0_00_30_06_c0_00_30_07"
)
x"c0_00_30_06_c0_00_30_07"
)
report
"incorrect MBLT data 64"
severity
error
;
report
"incorrect MBLT data 64"
severity
error
;
read32
(
x"00_30_c0_10"
,
c_AM_A24
,
d32
);
read32
(
x"00_30_c0_10"
,
c_AM_A24
,
d32
);
report
"at 10: "
&
hex8
(
d32
);
report
"at 10: "
&
hex8
(
d32
);
assert
d32
=
x"C000_3004"
assert
d32
=
x"C000_3004"
...
...
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