Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
V
VME64x core
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
VME64x core
Commits
44f9345f
Commit
44f9345f
authored
Oct 25, 2018
by
Tom Levens
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
Add generic to disable CR/CSR
Signed-off-by:
Tom Levens
<
tom.levens@cern.ch
>
parent
a2ee4ac4
Hide whitespace changes
Inline
Side-by-side
Showing
3 changed files
with
100 additions
and
54 deletions
+100
-54
vme64x_core.vhd
hdl/rtl/vme64x_core.vhd
+2
-0
vme_funct_match.vhd
hdl/rtl/vme_funct_match.vhd
+2
-2
xvme64x_core.vhd
hdl/rtl/xvme64x_core.vhd
+96
-52
No files found.
hdl/rtl/vme64x_core.vhd
View file @
44f9345f
...
...
@@ -13,6 +13,7 @@ entity vme64x_core is
generic
(
g_CLOCK_PERIOD
:
natural
;
g_DECODE_AM
:
boolean
:
=
true
;
g_ENABLE_CR_CSR
:
boolean
:
=
true
;
g_USER_CSR_EXT
:
boolean
:
=
false
;
g_WB_GRANULARITY
:
t_wishbone_address_granularity
;
g_MANUFACTURER_ID
:
std_logic_vector
(
23
downto
0
);
...
...
@@ -110,6 +111,7 @@ begin
generic
map
(
g_CLOCK_PERIOD
=>
g_CLOCK_PERIOD
,
g_DECODE_AM
=>
g_DECODE_AM
,
g_ENABLE_CR_CSR
=>
g_ENABLE_CR_CSR
,
g_USER_CSR_EXT
=>
g_USER_CSR_EXT
,
g_WB_GRANULARITY
=>
g_WB_GRANULARITY
,
g_MANUFACTURER_ID
=>
g_MANUFACTURER_ID
,
...
...
hdl/rtl/vme_funct_match.vhd
View file @
44f9345f
...
...
@@ -77,9 +77,9 @@ begin
and
((
am_i
=
ader_i
(
i
)(
t_ADER_AM
))
or
not
g_DECODE_AM
))
else
'0'
;
-- True if the AM
part of ADER
is enabled by AMCAP
-- True if the AM is enabled by AMCAP
s_ader_am_valid
(
i
)
<=
g_DECODER
(
i
)
.
amcap
(
to_integer
(
unsigned
(
a
der_i
(
i
)(
t_ADER_AM
)
)));
g_DECODER
(
i
)
.
amcap
(
to_integer
(
unsigned
(
a
m_i
)));
end
generate
;
------------------------------------------------------------------------------
...
...
hdl/rtl/xvme64x_core.vhd
View file @
44f9345f
...
...
@@ -35,6 +35,7 @@
library
ieee
;
use
ieee
.
std_logic_1164
.
all
;
use
ieee
.
numeric_std
.
all
;
use
work
.
wishbone_pkg
.
all
;
use
work
.
vme64x_pkg
.
all
;
...
...
@@ -49,6 +50,9 @@ entity xvme64x_core is
-- declared in the AMCAP.
g_DECODE_AM
:
boolean
:
=
true
;
-- Enable CR/CSR space
g_ENABLE_CR_CSR
:
boolean
:
=
true
;
-- Use external user CSR
g_USER_CSR_EXT
:
boolean
:
=
false
;
...
...
@@ -154,6 +158,30 @@ architecture rtl of xvme64x_core is
constant
c_last_ader
:
natural
:
=
compute_last_ader
(
g_DECODER
);
-- Calculate the least set bit in a vector
function
least_set_bit
(
v
:
std_logic_vector
)
return
natural
is
begin
for
i
in
0
to
v
'length
-1
loop
if
v
(
i
)
=
'1'
then
return
i
;
end
if
;
end
loop
;
end
least_set_bit
;
-- Compute the ADER for each function if CR/CSR is not used. For example:
-- ADEM=FF000000, GA=05 => ADER=05000000
-- ADEM=FFE00000, GA=05 => ADER=00A00000
function
compute_static_ader
(
ga
:
std_logic_vector
(
4
downto
0
))
return
t_ader_array
is
variable
a
:
t_ader_array
(
0
to
c_last_ader
)
:
=
(
others
=>
x"0000_0000"
);
begin
for
i
in
0
to
a
'length
-1
loop
if
g_DECODER
(
i
)
.
adem
/=
x"0000_0000"
then
a
(
i
)
:
=
std_logic_vector
(
resize
(
unsigned
(
ga
),
32
)
sll
least_set_bit
(
g_DECODER
(
i
)
.
adem
));
end
if
;
end
loop
;
return
a
;
end
compute_static_ader
;
signal
s_reset_n
:
std_logic
;
signal
s_vme_irq_n_o
:
std_logic_vector
(
7
downto
1
);
...
...
@@ -350,7 +378,7 @@ begin
inst_vme_funct_match
:
entity
work
.
vme_funct_match
generic
map
(
g_DECODER
=>
g_DECODER
,
g_DECODE_AM
=>
g_DECODE_AM
g_DECODE_AM
=>
g_DECODE_AM
and
g_ENABLE_CR_CSR
)
port
map
(
clk_i
=>
clk_i
,
...
...
@@ -390,67 +418,83 @@ begin
------------------------------------------------------------------------------
-- CR/CSR space
------------------------------------------------------------------------------
inst_vme_cr_csr_space
:
entity
work
.
vme_cr_csr_space
generic
map
(
g_MANUFACTURER_ID
=>
g_MANUFACTURER_ID
,
g_BOARD_ID
=>
g_BOARD_ID
,
g_REVISION_ID
=>
g_REVISION_ID
,
g_PROGRAM_ID
=>
g_PROGRAM_ID
,
g_ASCII_PTR
=>
g_ASCII_PTR
,
g_BEG_USER_CR
=>
g_BEG_USER_CR
,
g_END_USER_CR
=>
g_END_USER_CR
,
g_BEG_CRAM
=>
g_BEG_CRAM
,
g_END_CRAM
=>
g_END_CRAM
,
g_BEG_USER_CSR
=>
g_BEG_USER_CSR
,
g_END_USER_CSR
=>
g_END_USER_CSR
,
g_BEG_SN
=>
g_BEG_SN
,
g_END_SN
=>
g_END_SN
,
g_DECODER
=>
g_DECODER
)
port
map
(
clk_i
=>
clk_i
,
rst_n_i
=>
s_reset_n
,
vme_ga_i
=>
vme_i
.
ga
,
vme_berr_n_i
=>
s_vme_berr_n
,
bar_o
=>
s_bar
,
module_enable_o
=>
s_module_enable
,
module_reset_o
=>
s_module_reset
,
gen_enable_cr_csr
:
if
g_ENABLE_CR_CSR
=
true
generate
inst_vme_cr_csr_space
:
entity
work
.
vme_cr_csr_space
generic
map
(
g_MANUFACTURER_ID
=>
g_MANUFACTURER_ID
,
g_BOARD_ID
=>
g_BOARD_ID
,
g_REVISION_ID
=>
g_REVISION_ID
,
g_PROGRAM_ID
=>
g_PROGRAM_ID
,
g_ASCII_PTR
=>
g_ASCII_PTR
,
g_BEG_USER_CR
=>
g_BEG_USER_CR
,
g_END_USER_CR
=>
g_END_USER_CR
,
g_BEG_CRAM
=>
g_BEG_CRAM
,
g_END_CRAM
=>
g_END_CRAM
,
g_BEG_USER_CSR
=>
g_BEG_USER_CSR
,
g_END_USER_CSR
=>
g_END_USER_CSR
,
g_BEG_SN
=>
g_BEG_SN
,
g_END_SN
=>
g_END_SN
,
g_DECODER
=>
g_DECODER
)
port
map
(
clk_i
=>
clk_i
,
rst_n_i
=>
s_reset_n
,
addr_i
=>
s_cr_csr_addr
,
data_i
=>
s_cr_csr_data_i
,
data_o
=>
s_cr_csr_data_o
,
we_i
=>
s_cr_csr_we
,
vme_ga_i
=>
vme_i
.
ga
,
vme_berr_n_i
=>
s_vme_berr_n
,
bar_o
=>
s_bar
,
module_enable_o
=>
s_module_enable
,
module_reset_o
=>
s_module_reset
,
user_csr_addr_o
=>
s_use
r_csr_addr
,
user_csr_data_i
=>
s_use
r_csr_data_i
,
user_csr_data_o
=>
s_use
r_csr_data_o
,
user_csr_we_o
=>
s_use
r_csr_we
,
addr_i
=>
s_c
r_csr_addr
,
data_i
=>
s_c
r_csr_data_i
,
data_o
=>
s_c
r_csr_data_o
,
we_i
=>
s_c
r_csr_we
,
user_cr_addr_o
=>
user_cr_addr_o
,
user_cr_data_i
=>
user_cr_data_i
,
user_csr_addr_o
=>
s_user_csr_addr
,
user_csr_data_i
=>
s_user_csr_data_i
,
user_csr_data_o
=>
s_user_csr_data_o
,
user_csr_we_o
=>
s_user_csr_we
,
ader_o
=>
s_ader
);
user_cr_addr_o
=>
user_cr_addr_o
,
user_cr_data_i
=>
user_cr_data_i
,
-- User CSR space
gen_int_user_csr
:
if
g_USER_CSR_EXT
=
false
generate
inst_vme_user_csr
:
entity
work
.
vme_user_csr
port
map
(
clk_i
=>
clk_i
,
rst_n_i
=>
s_reset_n
,
addr_i
=>
s_user_csr_addr
,
data_i
=>
s_user_csr_data_o
,
data_o
=>
s_user_csr_data_i
,
we_i
=>
s_user_csr_we
,
irq_vector_o
=>
s_irq_vector
,
irq_level_o
=>
s_irq_level
ader_o
=>
s_ader
);
-- User CSR space
gen_int_user_csr
:
if
g_USER_CSR_EXT
=
false
generate
inst_vme_user_csr
:
entity
work
.
vme_user_csr
port
map
(
clk_i
=>
clk_i
,
rst_n_i
=>
s_reset_n
,
addr_i
=>
s_user_csr_addr
,
data_i
=>
s_user_csr_data_o
,
data_o
=>
s_user_csr_data_i
,
we_i
=>
s_user_csr_we
,
irq_vector_o
=>
s_irq_vector
,
irq_level_o
=>
s_irq_level
);
end
generate
;
gen_ext_user_csr
:
if
g_USER_CSR_EXT
=
true
generate
s_user_csr_data_i
<=
user_csr_data_i
;
s_irq_vector
<=
irq_vector_i
;
s_irq_level
<=
irq_level_i
(
2
downto
0
);
end
generate
;
end
generate
;
gen_
ext_user_csr
:
if
g_USER_CSR_EXT
=
tru
e
generate
gen_
disable_cr_csr
:
if
g_ENABLE_CR_CSR
=
fals
e
generate
s_user_csr_data_i
<=
user_csr_data_i
;
s_cr_csr_data_o
<=
s_user_csr_data_i
;
s_irq_vector
<=
irq_vector_i
;
s_irq_level
<=
irq_level_i
(
2
downto
0
);
s_user_csr_addr
<=
s_cr_csr_addr
;
s_user_csr_data_o
<=
s_cr_csr_data_i
;
s_user_csr_we
<=
s_cr_csr_we
;
user_cr_addr_o
<=
(
others
=>
'0'
);
s_module_enable
<=
'1'
;
s_module_reset
<=
'0'
;
s_bar
<=
(
others
=>
'0'
);
s_ader
<=
compute_static_ader
(
not
vme_i
.
ga
(
4
downto
0
));
end
generate
;
user_csr_addr_o
<=
s_user_csr_addr
;
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment