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VME64x core
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VME64x core
Commits
3125363d
Commit
3125363d
authored
Nov 27, 2017
by
Tristan Gingold
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vme_bus: address reset renaming.
parent
9174e0e7
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3 changed files
with
7 additions
and
9 deletions
+7
-9
GD-vme64x-core-review.txt
doc/review-2017-11-13/GD-vme64x-core-review.txt
+2
-2
vme_bus.vhd
hdl/rtl/vme_bus.vhd
+2
-2
xvme64x_core.vhd
hdl/rtl/xvme64x_core.vhd
+3
-5
No files found.
doc/review-2017-11-13/GD-vme64x-core-review.txt
View file @
3125363d
...
...
@@ -50,7 +50,7 @@
Done.
- if you make VME_bus.vhd with reset active low, then you don't need s_reset
signal anymore (see also comment in VME_bus.vhd).
OK
.
Done
.
------------------------
-- VME_bus.vhd --
...
...
@@ -61,7 +61,7 @@
else than 32-bit to g_WB_ADDR_WIDTH will result in synthesis/simulation error
Done.
- why reset is active high (rst_i) and not active low like in all other modules?
OK
.
Done
.
- constant num_latchDS misses "c_" prefix
OK.
- line 431: 3 nested if-s. How about simplifying to:
...
...
hdl/rtl/vme_bus.vhd
View file @
3125363d
...
...
@@ -73,7 +73,7 @@ entity vme_bus is
);
port
(
clk_i
:
in
std_logic
;
rst_
i
:
in
std_logic
;
rst_
n_i
:
in
std_logic
;
-- VME signals
VME_AS_n_i
:
in
std_logic
;
...
...
@@ -295,7 +295,7 @@ begin
variable
addr_word_incr
:
natural
range
0
to
7
;
begin
if
rising_edge
(
clk_i
)
then
if
rst_
i
=
'1
'
or
VME_AS_n_i
=
'1'
then
if
rst_
n_i
=
'0
'
or
VME_AS_n_i
=
'1'
then
-- FSM resetted after power up,
-- software reset, manually reset,
-- on rising edge of AS.
...
...
hdl/rtl/xvme64x_core.vhd
View file @
3125363d
...
...
@@ -196,7 +196,6 @@ end xvme64x_core;
architecture
rtl
of
xvme64x_core
is
signal
s_reset
:
std_logic
;
signal
s_reset_n
:
std_logic
;
signal
s_VME_IRQ_n_o
:
std_logic_vector
(
7
downto
1
);
...
...
@@ -333,7 +332,7 @@ begin
)
port
map
(
clk_i
=>
clk_i
,
rst_
i
=>
s_reset
,
rst_
n_i
=>
s_reset_n
,
-- VME
VME_AS_n_i
=>
s_VME_AS_n
,
...
...
@@ -393,9 +392,8 @@ begin
irq_ack_o
=>
s_irq_ack
);
s_reset
<=
(
not
rst_n_i
)
or
(
not
s_VME_RST_n
);
s_reset_n
<=
not
s_reset
;
rst_n_o
<=
not
(
s_reset
or
s_module_reset
);
s_reset_n
<=
rst_n_i
and
s_VME_RST_n
;
rst_n_o
<=
s_reset_n
and
(
not
s_module_reset
);
vme_o
.
berr_n
<=
s_vme_berr_n
;
...
...
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