Expose card_sel signal at the top of vme_bus module (for shared VME on Dab64x…

Expose card_sel signal at the top of vme_bus module (for shared VME on Dab64x board). Leave it open in the upper blocks if unused.

Expose card_sel signal at the top of vme_bus module (for shared VME on Dab64x…
Expose card_sel signal at the top of vme_bus module (for shared VME on Dab64x board). Leave it open in the upper blocks if unused.
2ff3ca1b · Mathieu Saccani · def8d371 · 2ff3ca1b
Commit 2ff3ca1b authored Dec 07, 2020 by Mathieu Saccani
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Showing with 6 additions and 4 deletions

vme_bus.vhd hdl/rtl/vme_bus.vhd +6 -4

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--- a/hdl/rtl/vme_bus.vhd
+++ b/hdl/rtl/vme_bus.vhd
@@ -110,7 +110,10 @@ entity vme_bus is
    int_level_i     : in  std_logic_vector( 2 downto 0);
    int_vector_i    : in  std_logic_vector( 7 downto 0);
    irq_pending_i   : in  std_logic;
-    irq_ack_o       : out std_logic
+    irq_ack_o       : out std_logic;
+    
+    --Card selection
+    card_sel_o      : out std_logic;
  );
 end vme_bus;

@@ -140,7 +143,6 @@ architecture rtl of vme_bus is
  signal vme_odff_retry_n          : std_logic;
  signal vme_odff_retry_oe         : std_logic;

-  signal vme_xam                   : std_logic_vector(7 downto 0);
  signal vme_cycles                : unsigned (7 downto 0);

  --  If set, dtack is controled directly from ds.
@@ -725,8 +727,6 @@ begin
              vme_idff_lword_n <= vme_lword_n_i;
              vme_idff_data    <= vme_data_i;

-              vme_xam <= addr_reg(7 downto 0);
-
              load_addr_reg_phase2 <= '1';
              s_wb_start <= '1';

@@ -1182,6 +1182,8 @@ begin
  vme_retry_oe_o <= vme_odff_retry_oe;

  vme_dtack_oe_o <= vme_odff_dtack_oe;
+  
+  card_sel_o     <= s_card_sel;

  process (vme_odff_dtack_n, vme_nsync_ds_n_i, vme_dtack_async_ctrl)
  begin