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VME64x core
Commit 1d0d3d91 authored by Tristan Gingold's avatar Tristan Gingold
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vme_bus: avoid possible wrap-around.

parent 3ed18b06
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doc/review-2017-11-13/GD-vme64x-core-review.txt
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...@@ -78,7 +78,7 @@ ...@@ -78,7 +78,7 @@
if for whatever reason you stay longer in DECODE_ACCESS waiting for if for whatever reason you stay longer in DECODE_ACCESS waiting for
decode_done_i='1' you might end up going to WAIT_FOR_DS when your counter is decode_done_i='1' you might end up going to WAIT_FOR_DS when your counter is
already 0, then after your decrement your counter rolls over already 0, then after your decrement your counter rolls over
OK. Done.
-------------------------- --------------------------
-- VME_CR_CSR_Space.vhd -- -- VME_CR_CSR_Space.vhd --
......
hdl/rtl/vme_bus.vhd
View file @ 1d0d3d91
...@@ -452,7 +452,9 @@ begin ...@@ -452,7 +452,9 @@ begin
-- VITAL-1 Table 4-1 -- VITAL-1 Table 4-1
-- For interrupts ack, the handler MUST NOT drive WRITE* low -- For interrupts ack, the handler MUST NOT drive WRITE* low
s_WRITElatched_n <= VME_WRITE_n_i; s_WRITElatched_n <= VME_WRITE_n_i;
s_DS_latch_count <= s_DS_latch_count - 1; if s_DS_latch_count /= 0 then
s_DS_latch_count <= s_DS_latch_count - 1;
end if;
s_mainFSMstate <= LATCH_DS; s_mainFSMstate <= LATCH_DS;
else else
s_mainFSMstate <= WAIT_FOR_DS; s_mainFSMstate <= WAIT_FOR_DS;
......
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