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VME64x core
Commits
0c0cd06f
Commit
0c0cd06f
authored
Sep 12, 2017
by
Tristan Gingold
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Remove ADEM fake -1 value.
parent
e2b58f6b
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3 changed files
with
11 additions
and
9 deletions
+11
-9
VME64xCore_Top.vhd
hdl/vme64x-core/rtl/VME64xCore_Top.vhd
+1
-3
VME_CR_CSR_Space.vhd
hdl/vme64x-core/rtl/VME_CR_CSR_Space.vhd
+9
-5
VME_Funct_Match.vhd
hdl/vme64x-core/rtl/VME_Funct_Match.vhd
+1
-1
No files found.
hdl/vme64x-core/rtl/VME64xCore_Top.vhd
View file @
0c0cd06f
...
@@ -354,8 +354,7 @@ architecture RTL of VME64xCore_Top is
...
@@ -354,8 +354,7 @@ architecture RTL of VME64xCore_Top is
-- CR/CSR parameter arrays
-- CR/CSR parameter arrays
-- ADEM array has an extra index (-1) to simplify looping while checking the
-- ADEM array has an extra index (-1) to simplify looping while checking the
-- EFM bit of the previous function.
-- EFM bit of the previous function.
constant
c_ADEM
:
t_adem_array
(
-1
to
7
)
:
=
(
constant
c_ADEM
:
t_adem_array
(
0
to
7
)
:
=
(
x"0000_0000"
,
g_F0_ADEM
,
g_F1_ADEM
,
g_F2_ADEM
,
g_F3_ADEM
,
g_F0_ADEM
,
g_F1_ADEM
,
g_F2_ADEM
,
g_F3_ADEM
,
g_F4_ADEM
,
g_F5_ADEM
,
g_F6_ADEM
,
g_F7_ADEM
g_F4_ADEM
,
g_F5_ADEM
,
g_F6_ADEM
,
g_F7_ADEM
);
);
...
@@ -422,7 +421,6 @@ begin
...
@@ -422,7 +421,6 @@ begin
VME_RETRY_OE_o
=>
VME_RETRY_OE_o
,
VME_RETRY_OE_o
=>
VME_RETRY_OE_o
,
VME_WRITE_n_i
=>
s_VME_WRITE_n
(
2
),
VME_WRITE_n_i
=>
s_VME_WRITE_n
(
2
),
VME_DS_n_i
=>
s_VME_DS_n
(
5
downto
4
),
VME_DS_n_i
=>
s_VME_DS_n
(
5
downto
4
),
VME_DS_ant_n_i
=>
s_VME_DS_n
(
3
downto
2
),
VME_DTACK_n_o
=>
s_VME_DTACK_VMEbus
,
VME_DTACK_n_o
=>
s_VME_DTACK_VMEbus
,
VME_DTACK_OE_o
=>
s_VME_DTACK_OE_VMEbus
,
VME_DTACK_OE_o
=>
s_VME_DTACK_OE_VMEbus
,
VME_BERR_n_o
=>
s_vme_berr_n
,
VME_BERR_n_o
=>
s_vme_berr_n
,
...
...
hdl/vme64x-core/rtl/VME_CR_CSR_Space.vhd
View file @
0c0cd06f
...
@@ -122,7 +122,7 @@ entity VME_CR_CSR_Space is
...
@@ -122,7 +122,7 @@ entity VME_CR_CSR_Space is
g_END_USER_CSR
:
std_logic_vector
(
23
downto
0
);
g_END_USER_CSR
:
std_logic_vector
(
23
downto
0
);
g_BEG_SN
:
std_logic_vector
(
23
downto
0
);
g_BEG_SN
:
std_logic_vector
(
23
downto
0
);
g_END_SN
:
std_logic_vector
(
23
downto
0
);
g_END_SN
:
std_logic_vector
(
23
downto
0
);
g_ADEM
:
t_adem_array
(
-1
to
7
);
g_ADEM
:
t_adem_array
(
0
to
7
);
g_AMCAP
:
t_amcap_array
(
0
to
7
);
g_AMCAP
:
t_amcap_array
(
0
to
7
);
g_XAMCAP
:
t_xamcap_array
(
0
to
7
);
g_XAMCAP
:
t_xamcap_array
(
0
to
7
);
g_DAWPR
:
t_dawpr_array
(
0
to
7
)
g_DAWPR
:
t_dawpr_array
(
0
to
7
)
...
@@ -404,15 +404,18 @@ begin
...
@@ -404,15 +404,18 @@ begin
for
i
in
0
to
7
loop
for
i
in
0
to
7
loop
-- When FAF function or upper bits of previous FAF function, readback
-- When FAF function or upper bits of previous FAF function, readback
-- and output ADER given at the FAF inputs.
-- and output ADER given at the FAF inputs.
if
(
g_ADEM
(
i
-1
)(
c_ADEM_EFM
)
=
'1'
and
g_ADEM
(
i
-1
)(
c_ADEM_FAF
)
=
'1'
)
or
if
(
i
/=
0
and
(
g_ADEM
(
i
-1
)(
c_ADEM_EFM
)
=
'0'
and
g_ADEM
(
i
)(
c_ADEM_FAF
)
=
'1'
)
g_ADEM
(
i
-1
)(
c_ADEM_EFM
)
=
'1'
and
g_ADEM
(
i
-1
)(
c_ADEM_FAF
)
=
'1'
)
or
((
i
=
0
or
g_ADEM
(
i
-1
)(
c_ADEM_EFM
)
=
'0'
)
and
g_ADEM
(
i
)(
c_ADEM_FAF
)
=
'1'
)
then
then
s_ader
(
i
)
<=
faf_ader_i
(
i
);
s_ader
(
i
)
<=
faf_ader_i
(
i
);
ader_o
(
i
)
<=
faf_ader_i
(
i
);
ader_o
(
i
)
<=
faf_ader_i
(
i
);
-- When upper bits of previous DFS function and DFSR enabled, readback
-- When upper bits of previous DFS function and DFSR enabled, readback
-- the ADEM value and output zero.
-- the ADEM value and output zero.
elsif
g_ADEM
(
i
-1
)(
c_ADEM_EFM
)
=
'1'
and
g_ADEM
(
i
-1
)(
c_ADEM_DFS
)
=
'1'
and
elsif
i
/=
0
and
g_ADEM
(
i
-1
)(
c_ADEM_EFM
)
=
'1'
and
g_ADEM
(
i
-1
)(
c_ADEM_DFS
)
=
'1'
and
s_reg_ader
(
i
-1
)(
c_ADER_DFSR
)
=
'1'
s_reg_ader
(
i
-1
)(
c_ADER_DFSR
)
=
'1'
then
then
s_ader
(
i
)
<=
dfs_adem_i
(
i
);
s_ader
(
i
)
<=
dfs_adem_i
(
i
);
...
@@ -420,7 +423,8 @@ begin
...
@@ -420,7 +423,8 @@ begin
-- When a DFS function and DFSR enabled, readback the ADEM and output
-- When a DFS function and DFSR enabled, readback the ADEM and output
-- zero.
-- zero.
elsif
g_ADEM
(
i
-1
)(
c_ADEM_EFM
)
=
'0'
and
g_ADEM
(
i
)(
c_ADEM_DFS
)
=
'1'
and
elsif
(
i
=
0
or
g_ADEM
(
i
-1
)(
c_ADEM_EFM
)
=
'0'
)
and
g_ADEM
(
i
)(
c_ADEM_DFS
)
=
'1'
and
s_reg_ader
(
i
)(
c_ADER_DFSR
)
=
'1'
s_reg_ader
(
i
)(
c_ADER_DFSR
)
=
'1'
then
then
v_ader_b0
:
=
(
c_ADER_DFSR
=>
s_reg_ader
(
i
)(
c_ADER_DFSR
),
v_ader_b0
:
=
(
c_ADER_DFSR
=>
s_reg_ader
(
i
)(
c_ADER_DFSR
),
...
...
hdl/vme64x-core/rtl/VME_Funct_Match.vhd
View file @
0c0cd06f
...
@@ -38,7 +38,7 @@ use work.vme64x_pack.all;
...
@@ -38,7 +38,7 @@ use work.vme64x_pack.all;
entity
VME_Funct_Match
is
entity
VME_Funct_Match
is
generic
(
generic
(
g_ADEM
:
t_adem_array
(
-1
to
7
);
g_ADEM
:
t_adem_array
(
0
to
7
);
g_AMCAP
:
t_amcap_array
(
0
to
7
);
g_AMCAP
:
t_amcap_array
(
0
to
7
);
g_XAMCAP
:
t_xamcap_array
(
0
to
7
)
g_XAMCAP
:
t_xamcap_array
(
0
to
7
)
);
);
...
...
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