Commits · 874f587a99e11bbc6bf581069056c40ed9b3aee7 · Projects / urv-core

27 May, 2015 2 commits
- wip on wishbone BIU · 874f587a
  Tomasz Wlostowski authored May 27, 2015
  
  874f587a
- fixed wait states on long reads/writes · 14e06a77
  Tomasz Wlostowski authored May 27, 2015
  
  14e06a77
26 May, 2015 7 commits
- shifter refactor · b2bc141b
  Tomasz Wlostowski authored May 26, 2015
  
  b2bc141b
- fixed dropped jump if followed by multicycle instruction · 1cc11f80
  Tomasz Wlostowski authored May 26, 2015
  
  1cc11f80
- simplify mem address generation · a9fae1ac
  Tomasz Wlostowski authored May 26, 2015
  
  a9fae1ac
- attempt to pipeline decoding even more · 18f2be72
  Tomasz Wlostowski authored May 26, 2015
  
  18f2be72
- removed ugly mem2mem bypass · 15333cd6
  Tomasz Wlostowski authored May 26, 2015
  
  15333cd6
- 4-stage pipeline running sorting test program · c374e8af
  Tomasz Wlostowski authored May 26, 2015
  
  c374e8af
- load interlock seems to work · 08a9b8d4
  Tomasz Wlostowski authored May 26, 2015
  
  08a9b8d4
25 May, 2015 1 commit
- will add D stage · 2512ebf0
  Tomasz Wlostowski authored May 25, 2015
  
  2512ebf0
24 May, 2015 2 commits
- added wait states to the I/D interface. not tested yet · 79a000cb
  Tomasz Wlostowski authored May 24, 2015
  
  79a000cb
- runs sorting test, added barrel shifter and optimized a bit · 8d0fb7a5
  Tomasz Wlostowski authored May 24, 2015
  
  8d0fb7a5
23 May, 2015 2 commits
- sorting test works · fb33d0f1
  Tomasz Wlostowski authored May 23, 2015
  
  fb33d0f1
- initial version of the core. prints 'hello world' · 7c857885
  Tomasz Wlostowski authored May 23, 2015
  
  7c857885