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urv-core
Commit c5807b58 authored by Tomasz Wlostowski's avatar Tomasz Wlostowski
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coremark & ISA testsuite TB

parent 1cf413e9
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Showing with 609 additions and 11 deletions
sw/common/crtuser.S
View file @ c5807b58
......@@ -7,9 +7,6 @@
.global _start
_start:
j _entry
_trap:
j handle_trap
_entry:
nop
......
sw/coremark.patch 0 → 100644
View file @ c5807b58
This diff is collapsed.
sw/coremark/Makefile 0 → 100644
View file @ c5807b58
CROSS_COMPILE ?= /opt/gcc-riscv-5.2.0/bin/riscv64-unknown-elf-
CC = $(CROSS_COMPILE)gcc
LD = $(CROSS_COMPILE)ld
OBJDUMP = $(CROSS_COMPILE)objdump
OBJCOPY = $(CROSS_COMPILE)objcopy
SIZE = $(CROSS_COMPILE)size
ARCH = RV32IM
CFLAGS = -g -m32 -Os -msoft-float -march=$(ARCH) -I. -I../common -ffunction-sections -fdata-sections -DFLAGS_STR="\"\"" -I../coremark_v1.0/barebones -I../coremark_v1.0
OBJS = ../common/crtuser.o main.o ../common/uart.o ../common/printf.o ../common/vsprintf-xint.o \
../coremark_v1.0/core_list_join.o ../coremark_v1.0/core_matrix.o ../coremark_v1.0/core_state.o ../coremark_v1.0/barebones/cvt.o \
../coremark_v1.0/core_main.o ../coremark_v1.0/barebones/core_portme.o ../coremark_v1.0/core_util.o ../coremark_v1.0/barebones/ee_printf.o ../coremark_v1.0/fmod.o
LDS = ../common/user.ld
OUTPUT=hello
$(OUTPUT): $(LDS) $(OBJS)
${CC} -m32 -flto -Wl,--gc-sections -g -msoft-float -march=$(ARCH) -o $(OUTPUT).elf -nostartfiles $(OBJS) -lm -T $(LDS) -lc
${OBJCOPY} -O binary $(OUTPUT).elf $(OUTPUT).bin
${OBJDUMP} -D $(OUTPUT).elf > disasm.S
../genraminit $(OUTPUT).bin 16384 > $(OUTPUT).ram
$(SIZE) $(OUTPUT).elf
clean:
rm -f $(OUTPUT).elf $(OUTPUT).bin $(OBJS)
load:
../uart-bootloader.py $(OUTPUT).bin
%.o: %.S
${CC} -c -m32 -march=RV32IM $^ -o $@
\ No newline at end of file
sw/coremark/main.c 0 → 100644
View file @ c5807b58
#include "board.h"
#include "uart.h"
uint32_t sys_get_ticks()
{
return read_csr(0xc01);
}
extern void coremark_main(int argc, char *argv[]);
main()
{
uart_init_hw();
int argc = 1;
char *argv[] = {"coremark"};
int i;
pp_printf("Starting CoreMark 1.0\n");
coremark_main(argc, argv);
for(;;);
return 0;
}
sw/uart_bootloader/Makefile
View file @ c5807b58
......@@ -10,8 +10,10 @@ SIZE = $(CROSS_COMPILE)size
SYN_DIR=../../syn/spec
SYN_TOP_LEVEL=spec_top
# keep RV32I: the bootloader also emulates DIV/MULH instuctions
CFLAGS = -g -O2 -m32 -msoft-float -march=RV32I -I. -I../common -ffunction-sections -fdata-sections
OBJS = crt0.o boot.o ../common/uart.o ../common/emulate.o ../common/irq.o
OBJS = crtboot.o boot.o ../common/uart.o ../common/emulate.o ../common/irq.o
LDS = boot.ld
OUTPUT=uart-bootloader
......@@ -22,7 +24,6 @@ $(OUTPUT): $(LDS) $(OBJS)
$(SIZE) $(OUTPUT).elf
../genraminit $(OUTPUT).bin 512 0 0 > $(OUTPUT).ram
../genmeminit $(OUTPUT).bin 512 0 0 > $(OUTPUT).mem
# ../genraminit $(OUTPUT).bin 512 63488 15872 >> uart-bootloader.ram
clean:
rm -f $(OUTPUT).elf $(OUTPUT).bin $(OBJS)
......
syn/spec/rv_core_test.xise
View file @ c5807b58
......@@ -392,9 +392,6 @@
<file xil_pn:name="../../ip_cores/general-cores/platform/xilinx/wb_xilinx_fpga_loader/wb_xilinx_fpga_loader.vhd" xil_pn:type="FILE_VHDL">
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
</file>
<file xil_pn:name="../../ip_cores/general-cores/modules/common/gc_sync_register.vhd" xil_pn:type="FILE_VHDL">
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
</file>
<file xil_pn:name="../../ip_cores/general-cores/modules/wishbone/wb_simple_pwm/wb_simple_pwm.vhd" xil_pn:type="FILE_VHDL">
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
</file>
......@@ -416,9 +413,6 @@
<file xil_pn:name="../../ip_cores/general-cores/modules/wishbone/wb_uart/uart_baud_gen.vhd" xil_pn:type="FILE_VHDL">
<association xil_pn:name="Implementation" xil_pn:seqID="19"/>
</file>
<file xil_pn:name="../../ip_cores/general-cores/platform/xilinx/wb_xil_multiboot/xwb_xil_multiboot.vhd" xil_pn:type="FILE_VHDL">
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
</file>
<file xil_pn:name="../../ip_cores/general-cores/modules/genrams/xilinx/generic_dpram.vhd" xil_pn:type="FILE_VHDL">
<association xil_pn:name="Implementation" xil_pn:seqID="5"/>
</file>
......
tb/isa-testsuite/wave.do 0 → 100644
View file @ c5807b58
onerror {resume}
quietly WaveActivateNextPane {} 0
add wave -noupdate /main/DUT/clk_i
add wave -noupdate /main/DUT/rst_i
add wave -noupdate -expand -group RF-old /main/DUT/regfile/clk_i
add wave -noupdate -expand -group RF-old /main/DUT/regfile/rst_i
add wave -noupdate -expand -group RF-old /main/DUT/regfile/d_stall_i
add wave -noupdate -expand -group RF-old /main/DUT/regfile/rf_rs1_i
add wave -noupdate -expand -group RF-old /main/DUT/regfile/rf_rs2_i
add wave -noupdate -expand -group RF-old /main/DUT/regfile/d_rs1_i
add wave -noupdate -expand -group RF-old /main/DUT/regfile/d_rs2_i
add wave -noupdate -expand -group RF-old /main/DUT/regfile/x_rs1_value_o
add wave -noupdate -expand -group RF-old /main/DUT/regfile/x_rs2_value_o
add wave -noupdate -expand -group RF-old /main/DUT/regfile/w_rd_i
add wave -noupdate -expand -group RF-old /main/DUT/regfile/w_rd_value_i
add wave -noupdate -expand -group RF-old /main/DUT/regfile/w_rd_store_i
add wave -noupdate -expand -group RF-old /main/DUT/regfile/w_bypass_rd_write_i
add wave -noupdate -expand -group RF-old /main/DUT/regfile/w_bypass_rd_value_i
add wave -noupdate -expand -group RF-old /main/DUT/regfile/rs1_regfile
add wave -noupdate -expand -group RF-old /main/DUT/regfile/rs2_regfile
add wave -noupdate -expand -group RF-old /main/DUT/regfile/write
add wave -noupdate -expand -group RF-old /main/DUT/regfile/rs1_bypass
add wave -noupdate -expand -group RF-old /main/DUT/regfile/rs2_bypass
add wave -noupdate -expand -group RF-old /main/DUT/regfile/bank0/bypass
add wave -noupdate -expand -group RF-new /main/DUT/regfile2/clk_i
add wave -noupdate -expand -group RF-new /main/DUT/regfile2/rst_i
add wave -noupdate -expand -group RF-new /main/DUT/regfile2/d_stall_i
add wave -noupdate -expand -group RF-new /main/DUT/regfile2/rf_rs1_i
add wave -noupdate -expand -group RF-new /main/DUT/regfile2/rf_rs2_i
add wave -noupdate -expand -group RF-new /main/DUT/regfile2/d_rs1_i
add wave -noupdate -expand -group RF-new /main/DUT/regfile2/d_rs2_i
add wave -noupdate -expand -group RF-new /main/DUT/regfile2/x_rs1_value_o
add wave -noupdate -expand -group RF-new /main/DUT/regfile2/x_rs2_value_o
add wave -noupdate -expand -group RF-new /main/DUT/regfile2/w_rd_i
add wave -noupdate -expand -group RF-new /main/DUT/regfile2/w_rd_value_i
add wave -noupdate -expand -group RF-new /main/DUT/regfile2/w_rd_store_i
add wave -noupdate -expand -group RF-new /main/DUT/regfile2/w_bypass_rd_write_i
add wave -noupdate -expand -group RF-new /main/DUT/regfile2/w_bypass_rd_value_i
add wave -noupdate -expand -group RF-new /main/DUT/regfile2/rs1_regfile
add wave -noupdate -expand -group RF-new /main/DUT/regfile2/rs2_regfile
add wave -noupdate -expand -group RF-new /main/DUT/regfile2/write
add wave -noupdate -expand -group RF-new /main/DUT/regfile2/rs1_bypass_x
add wave -noupdate -expand -group RF-new /main/DUT/regfile2/rs2_bypass_x
add wave -noupdate -expand -group RF-new /main/DUT/regfile2/rs1_bypass_w
add wave -noupdate -expand -group RF-new /main/DUT/regfile2/rs2_bypass_w
add wave -noupdate -expand -group RF-new /main/DUT/regfile2/bypass_w
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {1252556 ps} 0}
configure wave -namecolwidth 250
configure wave -valuecolwidth 100
configure wave -justifyvalue left
configure wave -signalnamewidth 1
configure wave -snapdistance 10
configure wave -datasetprefix 0
configure wave -rowmargin 4
configure wave -childrowmargin 2
configure wave -gridoffset 0
configure wave -gridperiod 1
configure wave -griddelta 40
configure wave -timeline 0
configure wave -timelineunits ps
update
WaveRestoreZoom {21150368 ps} {21728928 ps}
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