testsuite: add more urv tests

8d8f369a · Tristan Gingold · 3c340f3d · 8d8f369a · 8d8f369a · 8d8f369a
Commit 8d8f369a authored Sep 15, 2022 by Tristan Gingold
Showing with 171 additions and 1 deletion

tests-urv.lst sw/testsuite/isa/tests-urv.lst +2 -0

Makefrag sw/testsuite/isa/urv/Makefrag +3 -1

ecc_ori.S sw/testsuite/isa/urv/ecc_ori.S +102 -0

fix_ecc_dbl_err.S sw/testsuite/isa/urv/fix_ecc_dbl_err.S +64 -0

No files found.
--- a/sw/testsuite/isa/tests-urv.lst
+++ b/sw/testsuite/isa/tests-urv.lst
 urv-p-write_ecc.ram
 urv-p-fix_ecc_1.ram
 urv-p-fix_ecc_2.ram
+urv-p-fix_ecc_dbl_err.ram
+urv-p-ecc_ori.ram
--- a/sw/testsuite/isa/urv/Makefrag
+++ b/sw/testsuite/isa/urv/Makefrag
@@ -5,7 +5,9 @@
 urv_ecc_tests = \
 	write_ecc \
 	fix_ecc_1 \
-	fix_ecc_2
+	fix_ecc_2 \
+	fix_ecc_dbl_err \
+	ecc_ori

 urv_p_tests = $(addprefix urv-p-, $(urv_ecc_tests))


--- a/sw/testsuite/isa/urv/ecc_ori.S
+++ b/sw/testsuite/isa/urv/ecc_ori.S
+# See LICENSE for license details.
+
+#*****************************************************************************
+# write_ecc.S
+#-----------------------------------------------------------------------------
+#
+# Test write_ecc trap.
+#
+
+#include "riscv_test.h"
+#include "test_macros.h"
+#include "urv_asm.h"
+	
+RVTEST_RV32S
+RVTEST_CODE_BEGIN
+	li	a0, 0xff00ff00
+	# Corrupt a0 (bank 1)
+	li	t1, 1
+	write_ecc a0, a0, t1
+	nop
+	nop
+	nop
+
+	# Test ori
+	ori	a1, a0, 0xffffff0f
+
+	# Check result
+	li	a2, 0xffffff0f
+	bne	a1, a2, fail
+
+	# Check handler was called
+	bne	t1, zero, fail
+
+
+	li	a0, 0xff00ff00
+	# Corrupt a0 (bank 2)
+	li	t1, 2
+	write_ecc a0, a0, t1
+	nop
+	nop
+	nop
+
+	# Test ori
+	ori	a1, a0, 0xffffff0f
+
+	# Check result
+	li	a2, 0xffffff0f
+	bne	a1, a2, fail
+
+	# Check handler was not called
+	beq	t1, zero, fail
+
+	j	pass
+
+	TEST_PASSFAIL
+
+	.globl trap_entry
+trap_entry:
+	fix_ecc x0,x0,x0
+	fix_ecc x1,x1,x1
+	fix_ecc x2,x2,x2
+	fix_ecc x3,x3,x3
+	fix_ecc x4,x4,x4
+	fix_ecc x5,x5,x5
+	fix_ecc x6,x6,x6
+	fix_ecc x7,x7,x7
+	fix_ecc x8,x8,x8
+	fix_ecc x9,x9,x9
+	fix_ecc x10,x10,x10
+	fix_ecc x11,x11,x11
+	fix_ecc x12,x12,x12
+	fix_ecc x13,x13,x13
+	fix_ecc x14,x14,x14
+	fix_ecc x15,x15,x15
+	fix_ecc x16,x16,x16
+	fix_ecc x17,x17,x17
+	fix_ecc x18,x18,x18
+	fix_ecc x19,x19,x19
+	fix_ecc x20,x20,x20
+	fix_ecc x21,x21,x21
+	fix_ecc x22,x22,x22
+	fix_ecc x23,x23,x23
+	fix_ecc x24,x24,x24
+	fix_ecc x25,x25,x25
+	fix_ecc x26,x26,x26
+	fix_ecc x27,x27,x27
+	fix_ecc x28,x28,x28
+	fix_ecc x29,x29,x29
+	fix_ecc x30,x30,x30
+	fix_ecc x31,x31,x31
+	# Clear t1
+	lui	t1,0
+	mret
+
+RVTEST_CODE_END
+
+  .data
+RVTEST_DATA_BEGIN
+
+  TEST_DATA
+
+RVTEST_DATA_END
--- a/sw/testsuite/isa/urv/fix_ecc_dbl_err.S
+++ b/sw/testsuite/isa/urv/fix_ecc_dbl_err.S
+# See LICENSE for license details.
+
+#*****************************************************************************
+# write_ecc.S
+#-----------------------------------------------------------------------------
+#
+# Test write_ecc trap.
+#
+
+#include "riscv_test.h"
+#include "test_macros.h"
+
+#include "urv_asm.h"
+	
+RVTEST_RV32S
+RVTEST_CODE_BEGIN
+
+	li TESTNUM, 2
+	li	t2, 2
+	li	t1, 3
+	# Write bad ECC for t2
+	write_ecc t2,t2,t1
+	nop		# avoid bypass
+	nop
+	nop
+	# Use t2
+	add	t3,t1,t2
+	j	fail	# Skipped by handler
+	# Check t2 has not been modified
+	add	t3,t1,t2
+	j	fail	# Skipped by handler
+
+	# Expect error from fix_ecc
+	lui	t0, %hi(0x100008)
+	sw	t0, %lo(0x100008)(t0)
+
+	# Try to fix t2
+	fix_ecc t2,t2,t2
+	nop      # Handler not executed, so this is executed
+	# Double error must have been detected
+	j	fail
+
+	TEST_PASSFAIL
+
+	.globl trap_entry
+trap_entry:
+	# Destroy t1, t0
+	li	t1, CAUSE_ECC_ERROR
+	csrr	t0, mcause
+	bne	t0, t1, fail
+	# Inc address by 8
+	csrr	t0, mepc
+	addi	t0, t0, 8
+	csrw	mepc, t0
+	mret
+
+RVTEST_CODE_END
+
+  .data
+RVTEST_DATA_BEGIN
+
+  TEST_DATA
+
+RVTEST_DATA_END