Remove default generic values

7c5526f9 · Sebastien Bourdeauducq · b079fdd3 · 7c5526f9 · 7c5526f9
Commit 7c5526f9 authored Aug 01, 2011 by Sebastien Bourdeauducq
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Showing with 2 additions and 2 deletions

tdc_delayline.vhd core/tdc_delayline.vhd +1 -1

tdc_lbc.vhd core/tdc_lbc.vhd +1 -1

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--- a/core/tdc_delayline.vhd
+++ b/core/tdc_delayline.vhd
@@ -25,7 +25,7 @@ use UNISIM.vcomponents.all;
 entity tdc_delayline is
    generic (
-        g_WIDTH : positive := 4 -- number of CARRY4 elements
+        g_WIDTH : positive -- number of CARRY4 elements
    );
    port ( 
         clk_sample_i : in std_logic;

--- a/core/tdc_lbc.vhd
+++ b/core/tdc_lbc.vhd
@@ -24,7 +24,7 @@ entity tdc_lbc is
    generic (
        -- Number of output bits.
        -- The number of input bits is 2^g_N-1.
-        g_N : positive := 4
+        g_N : positive
    );
    port (
         polarity_i   : in std_logic;