Clocking: remove PLLFMC1_CLK/PLLFMC2_CLK.
After a quick discussion (thanks Erik!) we concluded it was added for historical compatibility with the VFC card and never used in practice. It's safe to remove it (including the UFL and P2 connections).
------------ old message ----------
CERNies, does anybody remember why these lines were added in the original SVEC design (asking because we can't have both LVPECL and LVDS outputs in the CDCM61004 and these lines have fixed LVPECL bias resistors)?