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Simple VME FMC Carrier 7 - SVEC7
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  • #54

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Opened Apr 20, 2020 by Tomasz Wlostowski@twlostow
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Clocking: Kintex-7 doesn't support LVPECL.

Both CDCM61004 PLLs are configure for LVPECL outputs. Kintex-7 does not support 'native' LVPECL anymore - so we either need the clocks to be AC-coupled (+ level translated) or change to LVDS.

see: https://forums.xilinx.com/t5/Other-FPGA-Architecture/Does-kintex7-support-LVPECL-in-HR-bank/td-p/638212

Edited Apr 20, 2020 by Tomasz Wlostowski
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Reference: project/svec7#54