Not sure about the scope of the ferrite bead(s):
- If the scope is to clean-up the dc/dc ripple, it will do little.
- If it's to limit the noise from FPGA VCCINT (1.0V) consumption, it's not a good idea. I would keep a very low inductance connection to the VRM due to the very high dynamic current that FPGA requires on VCCINT.
- Does the 0R resistor at SENSE+ serve a purpose or could it be replaced with a net tie?
- Small dips in VCCBRAM can cause hard-to-trace bugs, is there a reason we take our SENSE from before the filtering and not near the load, which might offer improved regulation?