Present: Matthieu Cattin, Erik van der Bij, Tom Wlostowski, Carlos Gil
Major (Design changes)
The BOM must be seriously reduced! The 'simple' SVEC has now even
many more capacitor and resistor types than the VFC.
Remove 1nF and 10nF used for decoupling. Can be replaced by 100nF.
Even if 1nF and 10nF are needed in critical places (PLL filter), do
not use these values in decoupling.
The board mustn't contain any jumper, it will reduce the number of
mistakes and questions.
The FMC JTAG chain must be connected to the AFPGA (as on the SPEC).
The JTAG chain with the connector (optionnaly the USB chip) must
only contains the 2 FPGAs.
The AFPGA boot process must be simplified as follow:
Only one big Flash is connected to the SFPGA.
The AFPGA boot mode is always "Slave SPI" and the serial
progammation interface is connected to the SFPGA.
The SFPGA is in charge of booting the AFPGA.
The muxes can be removed, as well as one of the flash and the
The EEPROM connected to the SFPGA can be removed.
Add more decoupling capacitors.
Remove all BI power rails (V15N0BI, V5N2BI, V2N0BI, V5P0BI,
The power distribution must be re-designed as follow:
Use 3.3V from VME.
Use one TPS52126 DC/DC to generate 1.2V and 2.5V from VME 5V.
Use one TPS52126 DC/DC to generate 1.5V from VME 5V.
It can be placed close to the DDR chips as they're the only one
-> OR use three single DC/DC to generate 1.2V, 1.5V and
In any cases use the same DC/DC type to reduce the BOM.
The VME 12V is only used for the FMC slot.
Use a big Molex connector (c.f. for standard PC motherboard) to
provide 12V, 5V and 3.3V in stand-alone.
LEDs on all voltage rails should be removed, only one LED to
indicate that the board is powered is enough.
If possible, use only one inductor type.
C24 and C41 are rated 6.3V but connected to 12V!!
If possible, use only one fuse type.
Remove the FT2232 chip.
Replace the CP2102 by a CP2103 and use the GPIO pins for the JTAG
The DIP swithes can be removed. Not useful in a VME64x system.