SVEC - Gateware Release 2.0
Gateware
- V2.0 Bootloader bitstream (System FPGA, raw binary): svec-bootloader-v2-20140207.bin
- V2.0 Bootloader bitstream (System FPGA, Xilinx BIT): svec-bootloader-v2-20140207.bit
- V2.0 Bootloader bitstream (System FPGA, Intel HEX/MCS): svec-bootloader-v2-20140207.mcs
- V2.0 Golden bitstream (Application FPGA): svec-golden-v2.0-20140306.bin
Memory map
- Bootloader bitstream: see Gateware Manual, section 2.2 and Appendix A.
- Golden bitstream: see Gateware Manual, section 3.2 and Appendix B.
Documentation
Sources
All components correspond to the revisions with tag "gateware-v2.0" in the repositories enumerated below.
Release date
- 02 April 2014
Release notes
Bootloader update procedure:* see Gateware Manual, section 4.2.
New features:*
- bootloader: boot AFPGA from onboard flash memory.
- bootloader: program flash through VME.
- bootloader: version readable through VME.
- golden: added bitstream synthesis info for improved traceability.
Fixes:*
- bootloader: eliminated VME bus errors while releasing control to the AFPGA.
- bootloader: wbgen2 FIFO clear bit bugfix
- bootloader: force CDCM61004 PLL reset on SFPGA startup
- golden: updated to the latest VME64x core
2 April 2014