*~
*#
fifo_generator_v6_1
testbench/sfpga_bootloader/sample_bitstream/
*.*\#
\#*
.\#*
*.*~
syn/
work
*.wlf
modelsim.ini
transcript
*.vstf
*.bak
*.vcd
*.h
doc/
*.o
*.bin
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Makefile
Backup*.cdr
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*.log
*.htm
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*.vmf
*.bit