Programming languages used in this repository

  •   VHDL
    46.16 %
  •   Verilog
    25.68 %
  •   SystemVerilog
    10.94 %
  •   C
    9.37 %
  •   Stata
    2.99 %
  •   HTML
    2.17 %
  •   Python
    1.08 %
  •   Lua
    1.01 %
  •   Makefile
    0.38 %
  •   Tcl
    0.18 %
  •   Shell
    0.05 %

Commit statistics for 54618b729a0112964f19b9bd6222f5aeb4b22865 Jun 08 - Oct 02

  • Total: 151 commits
  • Average per day: 0.0 commits
  • Authors: 7

Commits per day of month

Commits per weekday

Commits per day hour (UTC)