Commits · v1.4.5 · Projects / Simple VME FMC Carrier SVEC · Open Hardware Repository

16 Dec, 2019 4 commits
- update CHANGELOG for release 1.4.5 · 52d631c9
  Federico Vaga authored Dec 16, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  52d631c9
- sw:drv: coccicheck fix · ade858e1
  Federico Vaga authored Dec 16, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  ade858e1
- sw:drv: fix Makefile target name coccicheck · ca5f4f59
  Federico Vaga authored Dec 16, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  ca5f4f59
- sw:drv: checkpatch fixes · 1f3df4cd
  Federico Vaga authored Dec 16, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  1f3df4cd
13 Dec, 2019 3 commits
- Merge branch 'release/v1.4.4' into develop · 4164a478
  Federico Vaga authored Dec 13, 2019
  
  4164a478
- update changelog for release 1.4.4 · f7e4d0bb
  Federico Vaga authored Dec 13, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  f7e4d0bb
- sw:drv: change i2c controller name · ee13fd19
  Federico Vaga authored Dec 13, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  ee13fd19
17 Oct, 2019 4 commits
- update CHANGELOG for release · 5126b7ea
  Federico Vaga authored Oct 17, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  5126b7ea
- doc: add SPHINX documentation · 8be2eef6
  Federico Vaga authored Oct 17, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  8be2eef6
- update CHANGELOG for release · 658e63ef
  Federico Vaga authored Oct 17, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  658e63ef
- sw: read the app metadata as well in debugfs · e380b0f7
  Federico Vaga authored Oct 17, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  e380b0f7
15 Oct, 2019 2 commits
- add .rst extension to CHANGELOG · b27e8ad4
  Federico Vaga authored Oct 15, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  b27e8ad4
- update CHANGELOG for release · 78b929e6
  Federico Vaga authored Oct 15, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  78b929e6
26 Sep, 2019 1 commit
- sw: improve Makefile targets · f9cbd123
  Federico Vaga authored Sep 26, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  f9cbd123
25 Sep, 2019 3 commits
- update CHANGELOG · 5224fb1b
  Federico Vaga authored Sep 25, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  5224fb1b
- Merge branch 'release/v1.4.0' · fe819b40
  Federico Vaga authored Sep 25, 2019
  
  fe819b40
- sw:drv: fix I2C filter function · cf6b2894
  Federico Vaga authored Sep 25, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  cf6b2894
24 Sep, 2019 3 commits
- sw:drv: follow HDL renaming template -> base · 84ff1837
  Federico Vaga authored Sep 24, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  84ff1837
- Merge remote-tracking branch 'origin/proposed_master' into develop · dcea0685
  Federico Vaga authored Sep 24, 2019
  
  dcea0685
- Update golden after renaming. · 4b432b68
  Tristan Gingold authored Sep 24, 2019
  
  4b432b68
23 Sep, 2019 1 commit
- Rename template -> base · 46bd7e78
  Tristan Gingold authored Sep 23, 2019
  
  46bd7e78
11 Sep, 2019 3 commits
- sw:drv: validate input · 42aca0a7
  Federico Vaga authored Sep 11, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  42aca0a7
- sw:drv: bugfix use correct funciton number · a8abe33e
  Federico Vaga authored Sep 11, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  a8abe33e
- sw:drv: fix app_id build · e356c034
  Federico Vaga authored Sep 11, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  e356c034
23 Aug, 2019 1 commit
- sw:drv: add debug message when programming FPGA · 44fd8dba
  Federico Vaga authored Aug 23, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  44fd8dba
22 Aug, 2019 11 commits
- Merge remote-tracking branch 'origin/proposed_master' into develop · 1632a555
  Federico Vaga authored Aug 22, 2019
  
  1632a555
- svec golden wr: fix port names, connexions... Tested ok. · 3da89c5c
  Tristan Gingold authored Aug 22, 2019
  
  3da89c5c
- svec template: fix interrupt wiring. · bcf5473e
  Tristan Gingold authored Aug 22, 2019
  
  bcf5473e
- sw:drv: fix build info endianess · 4df4d362
  Federico Vaga authored Aug 22, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  4df4d362
- sw:drv: generate FPGA header file from cheby · e8ea30b3
  Federico Vaga authored Aug 22, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  e8ea30b3
- sw:drv: ignore files · 324246cd
  Federico Vaga authored Aug 22, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  324246cd
- Merge branch 'proposed_master' into develop · 58314b58
  Federico Vaga authored Aug 22, 2019
  
  58314b58
- sw:drv: re-apply lost changes in sw|hdl merge · 7035a37a
  Federico Vaga authored Aug 22, 2019
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something was defentivelly wrong during the merge and I missed it.
This patch re-apply the good code
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  7035a37a
- sw: move tools to tools/ directory · d36a4c14
  Federico Vaga authored Aug 22, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  d36a4c14
- sw: move to software directory · 14b5cd97
  Federico Vaga authored Aug 22, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  14b5cd97
- Merge remote-tracking branch 'sw/master' · d1acc791
  Federico Vaga authored Aug 22, 2019
  
  d1acc791
02 Aug, 2019 2 commits
- [hdl] move UCFs to syn/common restructure DDR constraints · d8f4adcc
  Dimitris Lampridis authored Aug 02, 2019
  
  d8f4adcc
- [hdl] relax DMTD phase constraint · 53203b3c
  Dimitris Lampridis authored Aug 02, 2019
  
  53203b3c
25 Jul, 2019 2 commits
- [hdl] fix front-panel GPIO locations, they were inverted · 416aea5d
  Dimitris Lampridis authored Jul 25, 2019
  
  416aea5d
- [hdl] rework cross-clock domain constraints · f5c8df30
  Dimitris Lampridis authored Jul 25, 2019
  
  f5c8df30