Commits · 7ab7b175a8c3f9b45db0538f3bab36faea2d82b9 · Projects / Simple VME FMC Carrier SVEC

08 Feb, 2021 7 commits
- Merge tag 'v2.0.1' into develop · 7ab7b175
  Federico Vaga authored Feb 08, 2021
```
2.0.1 - 2021-02-08
==================
Added
-----
- sw: dynamically set the compatibility version between software and
FPGA
- sw: added the possibility to ignore the version check

Changed
-------
- hdl: the DMA interface changed to support BLT and MBLT acquisitions
```
  7ab7b175
- Merge branch 'release/v2.0.1' into master · 577b31c8
  Federico Vaga authored Feb 08, 2021
  
  577b31c8
- update changelog · 6fe71827
  Federico Vaga authored Feb 08, 2021
```
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
```
  6fe71827
- sw: get version compatibility from git · 23f81be6
  Federico Vaga authored Feb 08, 2021
```
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
```
  23f81be6
- Add data pages for DMA (so that it supports MBLT). · aa1ec6f4
  Tristan Gingold authored Feb 02, 2021
```
The memory map of the svec base is therefore changed.
```
  aa1ec6f4
- svec_base_wr.vhd: add a workaround for planAhead · 88e02d16
  Tristan Gingold authored Feb 02, 2021
```
so that it properly computes dependencies
```
  88e02d16
- Merge branch 'feature/dma-page' into develop · ad25e124
  Federico Vaga authored Feb 08, 2021
  
  ad25e124
02 Feb, 2021 2 commits
- Add data pages for DMA (so that it supports MBLT). · 4f3c6cb4
  Tristan Gingold authored Feb 02, 2021
```
The memory map of the svec base is therefore changed.
```
  4f3c6cb4
- svec_base_wr.vhd: add a workaround for planAhead · 908a1b22
  Tristan Gingold authored Feb 02, 2021
```
so that it properly computes dependencies
```
  908a1b22
05 Jan, 2021 6 commits
- Merge tag 'v1.5.2' into develop · 8d66ebf1
  Federico Vaga authored Jan 05, 2021
```
1.5.2 - 2020-11-24
==================
Added
-----
- sw: tool to inspect SVEC bitstream ROM

Fixed
-----
- hdl: svec-base version
```
  8d66ebf1
- Merge branch 'release/v1.5.2' into master · c15d15c7
  Federico Vaga authored Jan 05, 2021
  
  c15d15c7
- hdl: set version 1.5.2 · 730b8339
  Federico Vaga authored Jan 05, 2021
```
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
```
  730b8339
- update CHANGELOG · 5d33f760
  Federico Vaga authored Jan 05, 2021
```
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
```
  5d33f760
- sw: add tool to read FPGA version · 0b12a113
  Federico Vaga authored Jan 05, 2021
```
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
```
  0b12a113
- sw: create userspace API header file · e7859e87
  Federico Vaga authored Jan 05, 2021
```
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
```
  e7859e87
26 Nov, 2020 3 commits
- doc: change theme to RTD · 1974d2cc
  Federico Vaga authored Nov 26, 2020
```
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
```
  1974d2cc
- doc: show only one version of the fixed fields · dde52369
  Federico Vaga authored Nov 26, 2020
```
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
```
  dde52369
- doc: get version from git · 9a059998
  Federico Vaga authored Nov 26, 2020
```
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
```
  9a059998
24 Nov, 2020 7 commits
- Merge tag 'v1.5.1' into develop · da4ccd8a
  Federico Vaga authored Nov 24, 2020
```
1.5.1 - 2020-11-24
==================
Fixed
-----
- sw: NULL pointer at load time when using the SPI controller
- sw: remove old unload procedure that causes BUG_ON to be triggered
  without valid reasons
```
  da4ccd8a
- Merge branch 'release/v1.5.1' into master · 7afd1ca9
  Federico Vaga authored Nov 24, 2020
  
  7afd1ca9
- update CHANGELOG · e01743d3
  Federico Vaga authored Nov 24, 2020
```
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
```
  e01743d3
- Merge branch 'bugfix/spi-load-null-ptr' into develop · 082afb77
  Federico Vaga authored Nov 24, 2020
  
  082afb77
- bld: ignore more files · 17878c61
  Federico Vaga authored Nov 24, 2020
```
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
```
  17878c61
- sw:drv: remove useless REPROGRAMMED bit · 48a395b2
  Federico Vaga authored Nov 24, 2020
```
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
```
  48a395b2
- sw:drv: bugfix take the svec_dev ptr correctly · aae86210
  Federico Vaga authored Nov 24, 2020
```
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
```
  aae86210
03 Nov, 2020 1 commit
- sw:drv: improve style · c61322a8
  Federico Vaga authored Nov 03, 2020
```
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
```
  c61322a8
02 Nov, 2020 5 commits
- Merge tag 'v1.5.0' into develop · f4a05922
  Federico Vaga authored Nov 02, 2020
```
1.5.0 - 2020-11-02
===================
Added
-----
- sw: add SPI flash partitions
- hdl: enable DDR4

Changed
-------
- sw: internal driver improvements
```
  f4a05922
- Merge branch 'release/v1.5.0' into master · 3171ceaa
  Federico Vaga authored Nov 02, 2020
  
  3171ceaa
- more fixes to CHANGELOG format · cc80100f
  Federico Vaga authored Nov 02, 2020
```
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
```
  cc80100f
- update CHANGELOG for release · d65013f5
  Federico Vaga authored Nov 02, 2020
```
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
```
  d65013f5
- fix CHANGELOG format · 6e8803d4
  Federico Vaga authored Nov 02, 2020
```
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
```
  6e8803d4
27 Oct, 2020 4 commits
- sw: drv: Fix vmebus.h decalaration · 2c2d6198
  Mamta Shukla authored Oct 27, 2020
```
Signed-off-by: Mamta Shukla <mamta.ramendra.shukla@cern.ch>
```
  2c2d6198
- Merge remote-tracking branch 'origin/bugfix/device-ptr' into develop · e4cc7b04
  Federico Vaga authored Oct 27, 2020
  
  e4cc7b04
- sw: drv: Add condition to check Invaid VME dev · fa4cfedf
  Mamta Shukla authored Oct 27, 2020
```
A NULL check condition is added to warn about uninitialized and invalid
vme device.
Signed-off-by: Mamta Shukla <mamta.ramendra.shukla@cern.ch>
Suggested-by: Federico Vaga <federico.vaga@cern.ch>
```
  fa4cfedf
- Merge remote-tracking branch 'origin/feature/mtdparts' into develop · 5e488d67
  Federico Vaga authored Oct 27, 2020
  
  5e488d67
26 Oct, 2020 1 commit

sw: drv: Add flash partitions · 255529ba

Mamta Shukla authored Oct 26, 2020

Flash on svec requires partitons to hold bootloader(SFPGA) and later partition for storing application
bitstream to be loaded in AFPGA. The partitions can be observed as:

dev:    size   erasesize  name
mtd0: 00100000 00040000 "SFPGA"
mtd1: 00500000 00040000 "AFPGA"
mtd2: 00a00000 00040000 "AFPGA_DATA"
Signed-off-by: Mamta Shukla <mamta.ramendra.shukla@cern.ch>
Suggested-by: Federico Vaga <federico.vaga@cern.ch>

255529ba

22 Oct, 2020 3 commits

Merge branch 'feature/spi-flash' into develop · 585ec687
Federico Vaga authored Oct 22, 2020

585ec687
sw:drv: fix style issues · 09d2745e
Federico Vaga authored Oct 22, 2020
```
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
```
09d2745e

sw: drv: Fixes to enable spi-flash in svec · 6aef0d6b

Mamta Shukla authored Oct 22, 2020

The changes included to  access spi-flash are:
1] Add condition to check if SPI-FLASH is enabled in core or not.
2] Enable big_endian field for spi flash platform data to be identified on vme
3] Define frequencies using macro to maintain consistency throughout the code
4] Add correct flash chip/part number
Signed-off-by: Mamta Shukla <mamta.ramendra.shukla@cern.ch>

6aef0d6b

01 Oct, 2020 1 commit
- golden: enable ddr4 · d34e46df
  Tristan Gingold authored Oct 01, 2020
  
  d34e46df