Commit cf49b099 authored by Dimitris Lampridis's avatar Dimitris Lampridis

golden: add missing timing constraint for 20MHz VCXO clock input. Solves #1641.

parent b3454979
......@@ -255,4 +255,9 @@ NET "fmc0_prsntm2c_n_i" IOSTANDARD = "LVCMOS33";
NET "fmc0_scl_b" IOSTANDARD = "LVCMOS33";
NET "fmc0_sda_b" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# Timing constraints
#----------------------------------------
NET "clk_20m_vcxo_i" TNM_NET = clk_20m_vcxo_i;
TIMESPEC TS_clk_20m_vcxo_i = PERIOD "clk_20m_vcxo_i" 50 ns HIGH 50%;
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment