Commit 9ee7064c authored by Tristan Gingold's avatar Tristan Gingold

vmecore test: test BERR.

parent 15367582
......@@ -27,6 +27,7 @@ architecture rtl of vmecore_test is
-- 0x1002: nbr of WB read accesses (write to clear)
-- 0x1003: nbr of WB write accesses (likewise)
-- 0x1004: nbr of write errors in pattern ram
-- 0x1005: generates bus error.
-- 0x2000: counter (4B). Generate an interrupt when 0 is reached.
-- 0x3000: pattern ram (0x1000 * 4B)
signal counter : unsigned(31 downto 0);
......@@ -54,6 +55,7 @@ begin
if rising_edge(clk_sys_i) then
slave_o.ack <= '0';
slave_o.stall <= '0';
slave_o.err <= '0';
if rst_n_i = '0' then
counter <= (others => '0');
......@@ -103,6 +105,8 @@ begin
nbr_write <= (others => '0');
when "100" =>
nbr_write_errors <= (others => '0');
when "101" =>
slave_o.err <= '1';
when others =>
null;
end case;
......@@ -152,6 +156,8 @@ begin
slave_o.dat (15 downto 0) <= std_logic_vector (nbr_write);
when "100" =>
slave_o.dat <= std_logic_vector (nbr_write_errors);
when "101" =>
slave_o.err <= '1';
when others =>
null;
end case;
......
......@@ -384,6 +384,32 @@ do_irq_test (void)
report (num1 == num2 + 1, "IRQ reported");
}
static void
do_berr_test (void)
{
#define BERR_BIT 0x08
#define BIT_SET_REG 0x7fffb
#define BIT_CLR_REG 0x7fff7
conf[BIT_CLR_REG] = BERR_BIT; // BERR
report ((conf[BIT_SET_REG] & BERR_BIT) == 0, "BERR flag cleared (1)");
report ((conf[BIT_CLR_REG] & BERR_BIT) == 0, "BERR flag cleared (2)");
map_for_am (0x39);
ptr32[0x1005] = 1;
report ((conf[BIT_SET_REG] & BERR_BIT) != 0,
"BERR flag set after write error");
conf[BIT_CLR_REG] = BERR_BIT;
report ((conf[BIT_SET_REG] & BERR_BIT) == 0, "BERR flag cleared (3)");
(void)ptr32[0x1005];
report ((conf[BIT_SET_REG] & BERR_BIT) != 0,
"BERR flag set after read error");
conf[BIT_CLR_REG] = BERR_BIT;
}
static int
do_vme_test (void)
{
......@@ -401,6 +427,8 @@ do_vme_test (void)
do_test_dma (0x38); // MBLT
do_irq_test ();
do_berr_test ();
if (nbr_errors == 0)
{
printf ("Success!\n");
......
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