update changelog

Signed-off-by: Federico Vaga <federico.vaga@cern.ch>

update changelog
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
6fe71827 · Federico Vaga · 23f81be6 · 6fe71827
Commit 6fe71827 authored Feb 08, 2021 by Federico Vaga
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CHANGELOG.rst CHANGELOG.rst +11 -0

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 Change Log
 ==========

+2.0.1 - 2021-02-08
+==================
+Added
+-----
+- sw: dynamically set the compatibility version between software and FPGA
+- sw: added the possibility to ignore the version check
+
+Changed
+-------
+- hdl: the DMA interface changed to support BLT and MBLT acquisitions
+
 1.5.2 - 2020-11-24
 ==================
 Added