Commit 5c61eea4 authored by Tristan Gingold's avatar Tristan Gingold

svec_vmecore_test_top: adjust after vme64x_pkg changes.

parent c00f290c
......@@ -7,7 +7,7 @@
-- Author(s) : Tristan Gingold <tristan.gingold@cern.ch>
-- Company : CERN (BE-CO-HT)
-- Created : 2017-09-19
-- Last update: 2017-11-24
-- Last update: 2017-11-27
-- Standard : VHDL'93
-------------------------------------------------------------------------------
-- Description: Top-level file for the test design .
......@@ -301,7 +301,7 @@ begin -- architecture top
g_MANUFACTURER_ID => c_CERN_ID,
g_BOARD_ID => c_SVEC_ID,
g_REVISION_ID => c_SVEC_REVISION_ID,
g_PROGRAM_ID => c_PROGRAM_ID)
g_PROGRAM_ID => c_SVEC_PROGRAM_ID)
port map (
clk_i => clk_sys,
rst_n_i => local_reset_n,
......
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