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Simple VME FMC Carrier SVEC
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Simple VME FMC Carrier SVEC
Commits
4b447880
Commit
4b447880
authored
Oct 02, 2017
by
Tristan Gingold
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vmecore_test: add copyright headers.
parent
bfc53781
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41 additions
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+41
-0
vmecore_test.vhd
hdl/top/vmecore_test/vmecore_test.vhd
+31
-0
test_vme.c
software/vmecore_test/test_vme.c
+10
-0
No files found.
hdl/top/vmecore_test/vmecore_test.vhd
View file @
4b447880
--------------------------------------------------------------------------------
-- CERN (BE-CO-HT)
-- WB slave test bench for vme64x core
-- http://www.ohwr.org/projects/svec
--------------------------------------------------------------------------------
--
-- unit name: vmecore_test
--
-- author: Tristan Gingold <tristan.gingold@cern.ch>
--
-- description:
--
-- WB slave to be synthetize to test features of the vme64x core.
--
-- dependencies:
--
--------------------------------------------------------------------------------
-- GNU LESSER GENERAL PUBLIC LICENSE
--------------------------------------------------------------------------------
-- This source file is free software; you can redistribute it and/or modify it
-- under the terms of the GNU Lesser General Public License as published by the
-- Free Software Foundation; either version 2.1 of the License, or (at your
-- option) any later version. This source is distributed in the hope that it
-- will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty
-- of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
-- See the GNU Lesser General Public License for more details. You should have
-- received a copy of the GNU Lesser General Public License along with this
-- source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html
library
ieee
;
use
ieee
.
STD_LOGIC_1164
.
all
;
use
ieee
.
numeric_std
.
all
;
...
...
@@ -45,6 +74,7 @@ architecture rtl of vmecore_test is
signal
sram
:
sram_type
;
begin
-- Pattern of the pattern ram.
pattern
(
31
downto
16
)
<=
not
slave_i
.
adr
(
15
downto
0
);
pattern
(
15
downto
0
)
<=
slave_i
.
adr
(
15
downto
0
);
...
...
@@ -71,6 +101,7 @@ begin
if
slave_i
.
stb
=
'1'
then
if
slave_i
.
adr
(
13
downto
12
)
=
"00"
then
-- Save transaction (very cheap scope).
last_trans
(
15
downto
0
)
<=
slave_i
.
adr
(
15
downto
0
);
last_trans
(
19
downto
16
)
<=
slave_i
.
sel
;
last_trans
(
20
)
<=
slave_i
.
we
;
...
...
software/vmecore_test/test_vme.c
View file @
4b447880
/*
* Copyright (C) 2017 CERN (www.cern.ch)
* Author: Tristan Gingold <tristan.gingold@cern.ch>
*
* Released according to the GNU GPL, version 2 or any later version.
*
* test_vme: program to test the vme64xcore (to be used with the
* svec_vmecore_test design).
*/
#define _XOPEN_SOURCE 600
#include <stdio.h>
#include <stdlib.h>
...
...
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