Commit 03828317 authored by Tomasz Wlostowski's avatar Tomasz Wlostowski

hdl/rtl/bootloader: increase space for the AFPGA bitstream to 5 MB

parent cdaec84b
......@@ -6,7 +6,7 @@
-- Author : Tomasz Wlostowski
-- Company : CERN
-- Created : 2011-01-24
-- Last update: 2013-01-25
-- Last update: 2014-01-13
-- Platform : FPGA-generic
-- Standard : VHDL'93
-------------------------------------------------------------------------------
......@@ -48,14 +48,14 @@ package svec_bootloader_pkg is
constant c_SDB_SIGNATURE : t_byte_array(0 to 3) := (x"53", x"44", x"42", x"2D");
-- Filesystem root offset (i.e. the location of the SDB record table)
constant c_SDB_ROOT_OFFSET : std_logic_vector(23 downto 0) := x"500000";
constant c_SDB_ROOT_OFFSET : std_logic_vector(23 downto 0) := x"600000";
-- Offset of the file containing our bitstream (afpga.bin)
constant c_SDB_BITSTREAM_OFFSET : std_logic_vector(23 downto 0) := x"100000";
-- Size of our bitstream (maximum possible value). Used to limit download time
-- when the bitstream is invalid or the FPGA is not responding.
constant c_BITSTREAM_SIZE : std_logic_vector(23 downto 0) := x"400000";
constant c_BITSTREAM_SIZE : std_logic_vector(23 downto 0) := x"408000";
-- Signature of the bootloader in the card's CSR space. Used by the software
-- for probing the bootloader core.
......
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