Initial commit on IRIG_B capable spec7. LA32 is now IRIG_B output.

Fixed an actual crucial bug, long PPS dutycycles hold statemachine
Made irig_b toggle-able by setting top-level generic.
1 job from Irig_b_enabled in 2 minutes and 6 seconds (queued for 1 second)
Status Job ID Name Coverage
  Build
failed #8420
vitis_vivado_2019.2
SPEC7_REF_DESIGN build

02:06

 
Name Stage Failure
failed
SPEC7_REF_DESIGN build Build
WARNING: hdl/syn/spec7_ref_design/work/spec7_wr_ref_top.runs/processing_system_pcie_processing_system7_0_0_synth_1/*.rpt: no matching files 
WARNING: hdl/syn/spec7_ref_design/work/spec7_wr_ref_top.runs/processing_system_pcie_smartconnect_0_0_synth_1/*.rpt: no matching files
WARNING: hdl/syn/spec7_ref_design/work/*.bit: no matching files
WARNING: hdl/syn/spec7_ref_design/work/*.mmi: no matching files
WARNING: hdl/syn/spec7_ref_design/work/*.log: no matching files
WARNING: hdl/syn/spec7_ref_design/work/*.xsa: no matching files
ERROR: No files to upload
Cleaning up file based variables
ERROR: Job failed: exit code 1