{
  "design": {
    "design_info": {
      "boundary_crc": "0xF8B19E73E43D801C",
      "device": "xc7z035fbg676-1",
      "name": "ps_pcie",
      "synth_flow_mode": "Hierarchical",
      "tool_version": "2019.2",
      "validated": "true"
    },
    "design_tree": {
      "axi_uartlite_0": "",
      "ps7": "",
      "smartconnect_0": "",
      "smartconnect_1": "",
      "xdma_0": "",
      "xlconstant_axcache": "",
      "xlconstant_axlock": "",
      "xlconstant_axprot": ""
    },
    "interface_ports": {
      "DDR": {
        "mode": "Master",
        "vlnv": "xilinx.com:interface:ddrx_rtl:1.0",
        "parameters": {
          "CAN_DEBUG": {
            "value": "false",
            "value_src": "default"
          },
          "TIMEPERIOD_PS": {
            "value": "1250",
            "value_src": "default"
          },
          "MEMORY_TYPE": {
            "value": "COMPONENTS",
            "value_src": "default"
          },
          "DATA_WIDTH": {
            "value": "8",
            "value_src": "default"
          },
          "CS_ENABLED": {
            "value": "true",
            "value_src": "default"
          },
          "DATA_MASK_ENABLED": {
            "value": "true",
            "value_src": "default"
          },
          "SLOT": {
            "value": "Single",
            "value_src": "default"
          },
          "MEM_ADDR_MAP": {
            "value": "ROW_COLUMN_BANK",
            "value_src": "default"
          },
          "BURST_LENGTH": {
            "value": "8",
            "value_src": "default"
          },
          "AXI_ARBITRATION_SCHEME": {
            "value": "TDM",
            "value_src": "default"
          },
          "CAS_LATENCY": {
            "value": "11",
            "value_src": "default"
          },
          "CAS_WRITE_LATENCY": {
            "value": "11",
            "value_src": "default"
          }
        }
      },
      "FIXED_IO": {
        "mode": "Master",
        "vlnv": "xilinx.com:display_processing_system7:fixedio_rtl:1.0",
        "parameters": {
          "CAN_DEBUG": {
            "value": "false",
            "value_src": "default"
          }
        }
      },
      "M00_AXI_0": {
        "mode": "Master",
        "vlnv": "xilinx.com:interface:aximm_rtl:1.0",
        "parameters": {
          "DATA_WIDTH": {
            "value": "32"
          },
          "PROTOCOL": {
            "value": "AXI4"
          },
          "FREQ_HZ": {
            "value": "62500000"
          },
          "ID_WIDTH": {
            "value": "0",
            "value_src": "default"
          },
          "ADDR_WIDTH": {
            "value": "32"
          },
          "AWUSER_WIDTH": {
            "value": "0",
            "value_src": "default"
          },
          "ARUSER_WIDTH": {
            "value": "0",
            "value_src": "default"
          },
          "WUSER_WIDTH": {
            "value": "0",
            "value_src": "default"
          },
          "RUSER_WIDTH": {
            "value": "0",
            "value_src": "default"
          },
          "BUSER_WIDTH": {
            "value": "0",
            "value_src": "default"
          },
          "READ_WRITE_MODE": {
            "value": "READ_WRITE",
            "value_src": "default"
          },
          "HAS_BURST": {
            "value": "1",
            "value_src": "default"
          },
          "HAS_LOCK": {
            "value": "1",
            "value_src": "default"
          },
          "HAS_PROT": {
            "value": "1",
            "value_src": "default"
          },
          "HAS_CACHE": {
            "value": "1",
            "value_src": "default"
          },
          "HAS_QOS": {
            "value": "1",
            "value_src": "default"
          },
          "HAS_REGION": {
            "value": "0",
            "value_src": "const_prop"
          },
          "HAS_WSTRB": {
            "value": "1",
            "value_src": "default"
          },
          "HAS_BRESP": {
            "value": "1",
            "value_src": "default"
          },
          "HAS_RRESP": {
            "value": "1",
            "value_src": "default"
          },
          "SUPPORTS_NARROW_BURST": {
            "value": "0",
            "value_src": "user_prop"
          },
          "NUM_READ_OUTSTANDING": {
            "value": "1",
            "value_src": "user_prop"
          },
          "NUM_WRITE_OUTSTANDING": {
            "value": "1",
            "value_src": "user_prop"
          },
          "MAX_BURST_LENGTH": {
            "value": "1",
            "value_src": "user_prop"
          },
          "PHASE": {
            "value": "0.000",
            "value_src": "default"
          },
          "CLK_DOMAIN": {
            "value": "ps_pcie_aclk1_0",
            "value_src": "default"
          },
          "NUM_READ_THREADS": {
            "value": "1",
            "value_src": "default"
          },
          "NUM_WRITE_THREADS": {
            "value": "1",
            "value_src": "default"
          },
          "RUSER_BITS_PER_BYTE": {
            "value": "0",
            "value_src": "user_prop"
          },
          "WUSER_BITS_PER_BYTE": {
            "value": "0",
            "value_src": "user_prop"
          },
          "INSERT_VIP": {
            "value": "0",
            "value_src": "default"
          }
        }
      },
      "pcie_mgt_0": {
        "mode": "Master",
        "vlnv": "xilinx.com:interface:pcie_7x_mgt_rtl:1.0"
      }
    },
    "ports": {
      "aclk1_0": {
        "type": "clk",
        "direction": "I",
        "parameters": {
          "ASSOCIATED_BUSIF": {
            "value": "M00_AXI_0"
          },
          "CLK_DOMAIN": {
            "value": "ps_pcie_aclk1_0",
            "value_src": "default"
          },
          "FREQ_HZ": {
            "value": "62500000"
          },
          "INSERT_VIP": {
            "value": "0",
            "value_src": "default"
          },
          "PHASE": {
            "value": "0.000",
            "value_src": "default"
          }
        }
      },
      "pcie_clk": {
        "type": "clk",
        "direction": "I",
        "parameters": {
          "CLK_DOMAIN": {
            "value": "ps_pcie_pcie_clk",
            "value_src": "default"
          },
          "FREQ_HZ": {
            "value": "100000000",
            "value_src": "default"
          },
          "INSERT_VIP": {
            "value": "0",
            "value_src": "default"
          },
          "PHASE": {
            "value": "0.000",
            "value_src": "default"
          }
        }
      },
      "pcie_rst_n": {
        "type": "rst",
        "direction": "I",
        "parameters": {
          "INSERT_VIP": {
            "value": "0",
            "value_src": "default"
          },
          "POLARITY": {
            "value": "ACTIVE_LOW",
            "value_src": "default"
          }
        }
      },
      "user_lnk_up_0": {
        "direction": "O"
      },
      "usr_irq_ack_0": {
        "direction": "O",
        "left": "0",
        "right": "0"
      },
      "usr_irq_req_0": {
        "direction": "I",
        "left": "0",
        "right": "0"
      }
    },
    "components": {
      "axi_uartlite_0": {
        "vlnv": "xilinx.com:ip:axi_uartlite:2.0",
        "xci_name": "ps_pcie_axi_uartlite_0_0",
        "parameters": {
          "C_BAUDRATE": {
            "value": "115200"
          }
        }
      },
      "ps7": {
        "vlnv": "xilinx.com:ip:processing_system7:5.5",
        "xci_name": "ps_pcie_ps7_0",
        "parameters": {
          "PCW_ACT_APU_PERIPHERAL_FREQMHZ": {
            "value": "666.666687"
          },
          "PCW_ACT_CAN0_PERIPHERAL_FREQMHZ": {
            "value": "23.8095"
          },
          "PCW_ACT_CAN1_PERIPHERAL_FREQMHZ": {
            "value": "23.8095"
          },
          "PCW_ACT_CAN_PERIPHERAL_FREQMHZ": {
            "value": "10.000000"
          },
          "PCW_ACT_DCI_PERIPHERAL_FREQMHZ": {
            "value": "10.158730"
          },
          "PCW_ACT_ENET0_PERIPHERAL_FREQMHZ": {
            "value": "125.000000"
          },
          "PCW_ACT_ENET1_PERIPHERAL_FREQMHZ": {
            "value": "10.000000"
          },
          "PCW_ACT_FPGA0_PERIPHERAL_FREQMHZ": {
            "value": "50.000000"
          },
          "PCW_ACT_FPGA1_PERIPHERAL_FREQMHZ": {
            "value": "250.000000"
          },
          "PCW_ACT_FPGA2_PERIPHERAL_FREQMHZ": {
            "value": "10.000000"
          },
          "PCW_ACT_FPGA3_PERIPHERAL_FREQMHZ": {
            "value": "10.000000"
          },
          "PCW_ACT_I2C_PERIPHERAL_FREQMHZ": {
            "value": "50"
          },
          "PCW_ACT_PCAP_PERIPHERAL_FREQMHZ": {
            "value": "200.000000"
          },
          "PCW_ACT_QSPI_PERIPHERAL_FREQMHZ": {
            "value": "177.777771"
          },
          "PCW_ACT_SDIO_PERIPHERAL_FREQMHZ": {
            "value": "100.000000"
          },
          "PCW_ACT_SMC_PERIPHERAL_FREQMHZ": {
            "value": "10.000000"
          },
          "PCW_ACT_SPI_PERIPHERAL_FREQMHZ": {
            "value": "10.000000"
          },
          "PCW_ACT_TPIU_PERIPHERAL_FREQMHZ": {
            "value": "200.000000"
          },
          "PCW_ACT_TTC0_CLK0_PERIPHERAL_FREQMHZ": {
            "value": "111.111115"
          },
          "PCW_ACT_TTC0_CLK1_PERIPHERAL_FREQMHZ": {
            "value": "111.111115"
          },
          "PCW_ACT_TTC0_CLK2_PERIPHERAL_FREQMHZ": {
            "value": "111.111115"
          },
          "PCW_ACT_TTC1_CLK0_PERIPHERAL_FREQMHZ": {
            "value": "111.111115"
          },
          "PCW_ACT_TTC1_CLK1_PERIPHERAL_FREQMHZ": {
            "value": "111.111115"
          },
          "PCW_ACT_TTC1_CLK2_PERIPHERAL_FREQMHZ": {
            "value": "111.111115"
          },
          "PCW_ACT_TTC_PERIPHERAL_FREQMHZ": {
            "value": "50"
          },
          "PCW_ACT_UART_PERIPHERAL_FREQMHZ": {
            "value": "100.000000"
          },
          "PCW_ACT_USB0_PERIPHERAL_FREQMHZ": {
            "value": "60"
          },
          "PCW_ACT_USB1_PERIPHERAL_FREQMHZ": {
            "value": "60"
          },
          "PCW_ACT_WDT_PERIPHERAL_FREQMHZ": {
            "value": "111.111115"
          },
          "PCW_APU_CLK_RATIO_ENABLE": {
            "value": "6:2:1"
          },
          "PCW_APU_PERIPHERAL_FREQMHZ": {
            "value": "666.666666"
          },
          "PCW_CAN0_PERIPHERAL_CLKSRC": {
            "value": "External"
          },
          "PCW_CAN0_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_CAN1_PERIPHERAL_CLKSRC": {
            "value": "External"
          },
          "PCW_CAN1_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_CAN_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_CAN_PERIPHERAL_VALID": {
            "value": "0"
          },
          "PCW_CLK0_FREQ": {
            "value": "50000000"
          },
          "PCW_CLK1_FREQ": {
            "value": "250000000"
          },
          "PCW_CLK2_FREQ": {
            "value": "10000000"
          },
          "PCW_CLK3_FREQ": {
            "value": "10000000"
          },
          "PCW_CPU_CPU_6X4X_MAX_RANGE": {
            "value": "667"
          },
          "PCW_CPU_PERIPHERAL_CLKSRC": {
            "value": "ARM PLL"
          },
          "PCW_CRYSTAL_PERIPHERAL_FREQMHZ": {
            "value": "33.333333"
          },
          "PCW_DCI_PERIPHERAL_CLKSRC": {
            "value": "DDR PLL"
          },
          "PCW_DCI_PERIPHERAL_FREQMHZ": {
            "value": "10.159"
          },
          "PCW_DDR_PERIPHERAL_CLKSRC": {
            "value": "DDR PLL"
          },
          "PCW_DDR_RAM_BASEADDR": {
            "value": "0x00100000"
          },
          "PCW_DDR_RAM_HIGHADDR": {
            "value": "0x3FFFFFFF"
          },
          "PCW_DM_WIDTH": {
            "value": "4"
          },
          "PCW_DQS_WIDTH": {
            "value": "4"
          },
          "PCW_DQ_WIDTH": {
            "value": "32"
          },
          "PCW_DUAL_PARALLEL_QSPI_DATA_MODE": {
            "value": "x8"
          },
          "PCW_ENET0_BASEADDR": {
            "value": "0xE000B000"
          },
          "PCW_ENET0_ENET0_IO": {
            "value": "MIO 16 .. 27"
          },
          "PCW_ENET0_GRP_MDIO_ENABLE": {
            "value": "1"
          },
          "PCW_ENET0_GRP_MDIO_IO": {
            "value": "MIO 52 .. 53"
          },
          "PCW_ENET0_HIGHADDR": {
            "value": "0xE000BFFF"
          },
          "PCW_ENET0_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_ENET0_PERIPHERAL_ENABLE": {
            "value": "1"
          },
          "PCW_ENET0_PERIPHERAL_FREQMHZ": {
            "value": "1000 Mbps"
          },
          "PCW_ENET0_RESET_ENABLE": {
            "value": "1"
          },
          "PCW_ENET0_RESET_IO": {
            "value": "MIO 49"
          },
          "PCW_ENET1_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_ENET1_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_ENET_RESET_ENABLE": {
            "value": "1"
          },
          "PCW_ENET_RESET_POLARITY": {
            "value": "Active Low"
          },
          "PCW_ENET_RESET_SELECT": {
            "value": "Share reset pin"
          },
          "PCW_EN_4K_TIMER": {
            "value": "0"
          },
          "PCW_EN_CAN0": {
            "value": "0"
          },
          "PCW_EN_CAN1": {
            "value": "0"
          },
          "PCW_EN_CLK0_PORT": {
            "value": "1"
          },
          "PCW_EN_CLK1_PORT": {
            "value": "1"
          },
          "PCW_EN_CLK2_PORT": {
            "value": "0"
          },
          "PCW_EN_CLK3_PORT": {
            "value": "0"
          },
          "PCW_EN_CLKTRIG0_PORT": {
            "value": "0"
          },
          "PCW_EN_CLKTRIG1_PORT": {
            "value": "0"
          },
          "PCW_EN_CLKTRIG2_PORT": {
            "value": "0"
          },
          "PCW_EN_CLKTRIG3_PORT": {
            "value": "0"
          },
          "PCW_EN_DDR": {
            "value": "1"
          },
          "PCW_EN_EMIO_CAN0": {
            "value": "0"
          },
          "PCW_EN_EMIO_CAN1": {
            "value": "0"
          },
          "PCW_EN_EMIO_CD_SDIO0": {
            "value": "0"
          },
          "PCW_EN_EMIO_CD_SDIO1": {
            "value": "0"
          },
          "PCW_EN_EMIO_ENET0": {
            "value": "0"
          },
          "PCW_EN_EMIO_ENET1": {
            "value": "0"
          },
          "PCW_EN_EMIO_GPIO": {
            "value": "0"
          },
          "PCW_EN_EMIO_I2C0": {
            "value": "0"
          },
          "PCW_EN_EMIO_I2C1": {
            "value": "0"
          },
          "PCW_EN_EMIO_MODEM_UART0": {
            "value": "0"
          },
          "PCW_EN_EMIO_MODEM_UART1": {
            "value": "0"
          },
          "PCW_EN_EMIO_PJTAG": {
            "value": "0"
          },
          "PCW_EN_EMIO_SDIO0": {
            "value": "0"
          },
          "PCW_EN_EMIO_SDIO1": {
            "value": "0"
          },
          "PCW_EN_EMIO_SPI0": {
            "value": "0"
          },
          "PCW_EN_EMIO_SPI1": {
            "value": "0"
          },
          "PCW_EN_EMIO_SRAM_INT": {
            "value": "0"
          },
          "PCW_EN_EMIO_TRACE": {
            "value": "0"
          },
          "PCW_EN_EMIO_TTC0": {
            "value": "0"
          },
          "PCW_EN_EMIO_TTC1": {
            "value": "0"
          },
          "PCW_EN_EMIO_UART0": {
            "value": "0"
          },
          "PCW_EN_EMIO_UART1": {
            "value": "1"
          },
          "PCW_EN_EMIO_WDT": {
            "value": "0"
          },
          "PCW_EN_EMIO_WP_SDIO0": {
            "value": "0"
          },
          "PCW_EN_EMIO_WP_SDIO1": {
            "value": "0"
          },
          "PCW_EN_ENET0": {
            "value": "1"
          },
          "PCW_EN_ENET1": {
            "value": "0"
          },
          "PCW_EN_GPIO": {
            "value": "1"
          },
          "PCW_EN_I2C0": {
            "value": "1"
          },
          "PCW_EN_I2C1": {
            "value": "0"
          },
          "PCW_EN_MODEM_UART0": {
            "value": "0"
          },
          "PCW_EN_MODEM_UART1": {
            "value": "0"
          },
          "PCW_EN_PJTAG": {
            "value": "0"
          },
          "PCW_EN_PTP_ENET0": {
            "value": "0"
          },
          "PCW_EN_PTP_ENET1": {
            "value": "0"
          },
          "PCW_EN_QSPI": {
            "value": "1"
          },
          "PCW_EN_RST0_PORT": {
            "value": "0"
          },
          "PCW_EN_RST1_PORT": {
            "value": "1"
          },
          "PCW_EN_RST2_PORT": {
            "value": "0"
          },
          "PCW_EN_RST3_PORT": {
            "value": "0"
          },
          "PCW_EN_SDIO0": {
            "value": "1"
          },
          "PCW_EN_SDIO1": {
            "value": "0"
          },
          "PCW_EN_SMC": {
            "value": "0"
          },
          "PCW_EN_SPI0": {
            "value": "0"
          },
          "PCW_EN_SPI1": {
            "value": "0"
          },
          "PCW_EN_TRACE": {
            "value": "0"
          },
          "PCW_EN_TTC0": {
            "value": "0"
          },
          "PCW_EN_TTC1": {
            "value": "0"
          },
          "PCW_EN_UART0": {
            "value": "1"
          },
          "PCW_EN_UART1": {
            "value": "1"
          },
          "PCW_EN_USB0": {
            "value": "1"
          },
          "PCW_EN_USB1": {
            "value": "0"
          },
          "PCW_EN_WDT": {
            "value": "0"
          },
          "PCW_FCLK0_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_FCLK1_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_FCLK2_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_FCLK3_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_FCLK_CLK0_BUF": {
            "value": "TRUE"
          },
          "PCW_FCLK_CLK1_BUF": {
            "value": "TRUE"
          },
          "PCW_FPGA0_PERIPHERAL_FREQMHZ": {
            "value": "50"
          },
          "PCW_FPGA1_PERIPHERAL_FREQMHZ": {
            "value": "250"
          },
          "PCW_FPGA2_PERIPHERAL_FREQMHZ": {
            "value": "50"
          },
          "PCW_FPGA3_PERIPHERAL_FREQMHZ": {
            "value": "50"
          },
          "PCW_FPGA_FCLK0_ENABLE": {
            "value": "1"
          },
          "PCW_FPGA_FCLK1_ENABLE": {
            "value": "1"
          },
          "PCW_GP0_EN_MODIFIABLE_TXN": {
            "value": "1"
          },
          "PCW_GP0_NUM_READ_THREADS": {
            "value": "4"
          },
          "PCW_GP0_NUM_WRITE_THREADS": {
            "value": "4"
          },
          "PCW_GP1_EN_MODIFIABLE_TXN": {
            "value": "1"
          },
          "PCW_GP1_NUM_READ_THREADS": {
            "value": "4"
          },
          "PCW_GP1_NUM_WRITE_THREADS": {
            "value": "4"
          },
          "PCW_GPIO_BASEADDR": {
            "value": "0xE000A000"
          },
          "PCW_GPIO_EMIO_GPIO_ENABLE": {
            "value": "0"
          },
          "PCW_GPIO_HIGHADDR": {
            "value": "0xE000AFFF"
          },
          "PCW_GPIO_MIO_GPIO_ENABLE": {
            "value": "1"
          },
          "PCW_GPIO_MIO_GPIO_IO": {
            "value": "MIO"
          },
          "PCW_GPIO_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_I2C0_BASEADDR": {
            "value": "0xE0004000"
          },
          "PCW_I2C0_GRP_INT_ENABLE": {
            "value": "1"
          },
          "PCW_I2C0_GRP_INT_IO": {
            "value": "EMIO"
          },
          "PCW_I2C0_HIGHADDR": {
            "value": "0xE0004FFF"
          },
          "PCW_I2C0_I2C0_IO": {
            "value": "MIO 14 .. 15"
          },
          "PCW_I2C0_PERIPHERAL_ENABLE": {
            "value": "1"
          },
          "PCW_I2C0_RESET_ENABLE": {
            "value": "0"
          },
          "PCW_I2C1_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_I2C_PERIPHERAL_FREQMHZ": {
            "value": "111.111115"
          },
          "PCW_I2C_RESET_ENABLE": {
            "value": "1"
          },
          "PCW_I2C_RESET_POLARITY": {
            "value": "Active Low"
          },
          "PCW_I2C_RESET_SELECT": {
            "value": "Share reset pin"
          },
          "PCW_IMPORT_BOARD_PRESET": {
            "value": "None"
          },
          "PCW_INCLUDE_ACP_TRANS_CHECK": {
            "value": "0"
          },
          "PCW_IRQ_F2P_MODE": {
            "value": "DIRECT"
          },
          "PCW_MIO_0_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_0_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_0_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_10_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_10_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_10_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_11_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_11_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_11_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_12_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_12_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_12_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_13_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_13_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_13_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_14_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_14_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_14_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_15_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_15_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_15_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_16_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_16_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_16_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_17_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_17_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_17_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_18_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_18_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_18_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_19_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_19_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_19_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_1_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_1_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_1_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_20_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_20_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_20_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_21_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_21_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_21_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_22_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_22_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_22_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_23_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_23_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_23_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_24_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_24_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_24_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_25_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_25_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_25_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_26_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_26_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_26_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_27_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_27_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_27_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_28_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_28_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_28_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_29_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_29_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_29_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_2_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_2_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_30_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_30_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_30_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_31_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_31_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_31_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_32_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_32_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_32_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_33_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_33_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_33_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_34_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_34_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_34_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_35_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_35_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_35_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_36_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_36_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_36_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_37_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_37_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_37_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_38_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_38_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_38_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_39_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_39_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_39_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_3_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_3_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_40_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_40_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_40_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_41_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_41_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_41_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_42_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_42_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_42_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_43_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_43_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_43_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_44_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_44_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_44_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_45_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_45_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_45_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_46_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_46_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_46_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_47_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_47_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_47_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_48_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_48_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_48_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_49_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_49_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_49_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_4_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_4_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_50_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_50_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_50_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_51_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_51_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_51_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_52_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_52_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_52_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_53_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_53_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_53_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_5_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_5_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_6_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_6_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_7_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_7_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_8_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_8_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_9_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_9_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_9_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_PRIMITIVE": {
            "value": "54"
          },
          "PCW_MIO_TREE_PERIPHERALS": {
            "value": "Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#GPIO#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#I2C 0#I2C 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#SD 0#SD 0#SD 0#SD 0#SD 0#SD 0#SD 0#SD 0#USB Reset#ENET Reset#UART 0#UART 0#Enet 0#Enet 0"
          },
          "PCW_MIO_TREE_SIGNALS": {
            "value": "qspi1_ss_b#qspi0_ss_b#qspi0_io[0]#qspi0_io[1]#qspi0_io[2]#qspi0_io[3]/HOLD_B#qspi0_sclk#gpio[7]#qspi_fbclk#qspi1_sclk#qspi1_io[0]#qspi1_io[1]#qspi1_io[2]#qspi1_io[3]#scl#sda#tx_clk#txd[0]#txd[1]#txd[2]#txd[3]#tx_ctl#rx_clk#rxd[0]#rxd[1]#rxd[2]#rxd[3]#rx_ctl#data[4]#dir#stp#nxt#data[0]#data[1]#data[2]#data[3]#clk#data[5]#data[6]#data[7]#clk#cmd#data[0]#data[1]#data[2]#data[3]#wp#cd#reset#reset#rx#tx#mdc#mdio"
          },
          "PCW_NAND_CYCLES_T_AR": {
            "value": "1"
          },
          "PCW_NAND_CYCLES_T_CLR": {
            "value": "1"
          },
          "PCW_NAND_CYCLES_T_RC": {
            "value": "11"
          },
          "PCW_NAND_CYCLES_T_REA": {
            "value": "1"
          },
          "PCW_NAND_CYCLES_T_RR": {
            "value": "1"
          },
          "PCW_NAND_CYCLES_T_WC": {
            "value": "11"
          },
          "PCW_NAND_CYCLES_T_WP": {
            "value": "1"
          },
          "PCW_NOR_CS0_T_CEOE": {
            "value": "1"
          },
          "PCW_NOR_CS0_T_PC": {
            "value": "1"
          },
          "PCW_NOR_CS0_T_RC": {
            "value": "11"
          },
          "PCW_NOR_CS0_T_TR": {
            "value": "1"
          },
          "PCW_NOR_CS0_T_WC": {
            "value": "11"
          },
          "PCW_NOR_CS0_T_WP": {
            "value": "1"
          },
          "PCW_NOR_CS0_WE_TIME": {
            "value": "0"
          },
          "PCW_NOR_CS1_T_CEOE": {
            "value": "1"
          },
          "PCW_NOR_CS1_T_PC": {
            "value": "1"
          },
          "PCW_NOR_CS1_T_RC": {
            "value": "11"
          },
          "PCW_NOR_CS1_T_TR": {
            "value": "1"
          },
          "PCW_NOR_CS1_T_WC": {
            "value": "11"
          },
          "PCW_NOR_CS1_T_WP": {
            "value": "1"
          },
          "PCW_NOR_CS1_WE_TIME": {
            "value": "0"
          },
          "PCW_NOR_SRAM_CS0_T_CEOE": {
            "value": "1"
          },
          "PCW_NOR_SRAM_CS0_T_PC": {
            "value": "1"
          },
          "PCW_NOR_SRAM_CS0_T_RC": {
            "value": "11"
          },
          "PCW_NOR_SRAM_CS0_T_TR": {
            "value": "1"
          },
          "PCW_NOR_SRAM_CS0_T_WC": {
            "value": "11"
          },
          "PCW_NOR_SRAM_CS0_T_WP": {
            "value": "1"
          },
          "PCW_NOR_SRAM_CS0_WE_TIME": {
            "value": "0"
          },
          "PCW_NOR_SRAM_CS1_T_CEOE": {
            "value": "1"
          },
          "PCW_NOR_SRAM_CS1_T_PC": {
            "value": "1"
          },
          "PCW_NOR_SRAM_CS1_T_RC": {
            "value": "11"
          },
          "PCW_NOR_SRAM_CS1_T_TR": {
            "value": "1"
          },
          "PCW_NOR_SRAM_CS1_T_WC": {
            "value": "11"
          },
          "PCW_NOR_SRAM_CS1_T_WP": {
            "value": "1"
          },
          "PCW_NOR_SRAM_CS1_WE_TIME": {
            "value": "0"
          },
          "PCW_OVERRIDE_BASIC_CLOCK": {
            "value": "0"
          },
          "PCW_PACKAGE_DDR_BOARD_DELAY0": {
            "value": "0.121"
          },
          "PCW_PACKAGE_DDR_BOARD_DELAY1": {
            "value": "0.130"
          },
          "PCW_PACKAGE_DDR_BOARD_DELAY2": {
            "value": "0.131"
          },
          "PCW_PACKAGE_DDR_BOARD_DELAY3": {
            "value": "0.141"
          },
          "PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_0": {
            "value": "0.039"
          },
          "PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_1": {
            "value": "0.017"
          },
          "PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_2": {
            "value": "0.018"
          },
          "PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_3": {
            "value": "-0.004"
          },
          "PCW_PACKAGE_NAME": {
            "value": "fbg676"
          },
          "PCW_PCAP_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_PCAP_PERIPHERAL_FREQMHZ": {
            "value": "200"
          },
          "PCW_PERIPHERAL_BOARD_PRESET": {
            "value": "None"
          },
          "PCW_PJTAG_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_PLL_BYPASSMODE_ENABLE": {
            "value": "0"
          },
          "PCW_PRESET_BANK0_VOLTAGE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_PRESET_BANK1_VOLTAGE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_PS7_SI_REV": {
            "value": "PRODUCTION"
          },
          "PCW_QSPI_GRP_FBCLK_ENABLE": {
            "value": "1"
          },
          "PCW_QSPI_GRP_FBCLK_IO": {
            "value": "MIO 8"
          },
          "PCW_QSPI_GRP_IO1_ENABLE": {
            "value": "1"
          },
          "PCW_QSPI_GRP_IO1_IO": {
            "value": "MIO 0 9 .. 13"
          },
          "PCW_QSPI_GRP_SINGLE_SS_ENABLE": {
            "value": "0"
          },
          "PCW_QSPI_GRP_SS1_ENABLE": {
            "value": "0"
          },
          "PCW_QSPI_INTERNAL_HIGHADDRESS": {
            "value": "0xFDFFFFFF"
          },
          "PCW_QSPI_PERIPHERAL_CLKSRC": {
            "value": "DDR PLL"
          },
          "PCW_QSPI_PERIPHERAL_ENABLE": {
            "value": "1"
          },
          "PCW_QSPI_PERIPHERAL_FREQMHZ": {
            "value": "180"
          },
          "PCW_QSPI_QSPI_IO": {
            "value": "MIO 1 .. 6"
          },
          "PCW_SD0_GRP_CD_ENABLE": {
            "value": "1"
          },
          "PCW_SD0_GRP_CD_IO": {
            "value": "MIO 47"
          },
          "PCW_SD0_GRP_POW_ENABLE": {
            "value": "0"
          },
          "PCW_SD0_GRP_WP_ENABLE": {
            "value": "1"
          },
          "PCW_SD0_GRP_WP_IO": {
            "value": "MIO 46"
          },
          "PCW_SD0_PERIPHERAL_ENABLE": {
            "value": "1"
          },
          "PCW_SD0_SD0_IO": {
            "value": "MIO 40 .. 45"
          },
          "PCW_SD1_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_SDIO0_BASEADDR": {
            "value": "0xE0100000"
          },
          "PCW_SDIO0_HIGHADDR": {
            "value": "0xE0100FFF"
          },
          "PCW_SDIO_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_SDIO_PERIPHERAL_FREQMHZ": {
            "value": "100"
          },
          "PCW_SDIO_PERIPHERAL_VALID": {
            "value": "1"
          },
          "PCW_SMC_CYCLE_T0": {
            "value": "NA"
          },
          "PCW_SMC_CYCLE_T1": {
            "value": "NA"
          },
          "PCW_SMC_CYCLE_T2": {
            "value": "NA"
          },
          "PCW_SMC_CYCLE_T3": {
            "value": "NA"
          },
          "PCW_SMC_CYCLE_T4": {
            "value": "NA"
          },
          "PCW_SMC_CYCLE_T5": {
            "value": "NA"
          },
          "PCW_SMC_CYCLE_T6": {
            "value": "NA"
          },
          "PCW_SMC_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_SMC_PERIPHERAL_VALID": {
            "value": "0"
          },
          "PCW_SPI0_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_SPI1_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_SPI_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_SPI_PERIPHERAL_VALID": {
            "value": "0"
          },
          "PCW_S_AXI_HP0_DATA_WIDTH": {
            "value": "64"
          },
          "PCW_S_AXI_HP0_ID_WIDTH": {
            "value": "6"
          },
          "PCW_TPIU_PERIPHERAL_CLKSRC": {
            "value": "External"
          },
          "PCW_TRACE_INTERNAL_WIDTH": {
            "value": "2"
          },
          "PCW_TRACE_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_TTC0_CLK0_PERIPHERAL_CLKSRC": {
            "value": "CPU_1X"
          },
          "PCW_TTC0_CLK0_PERIPHERAL_DIVISOR0": {
            "value": "1"
          },
          "PCW_TTC0_CLK1_PERIPHERAL_CLKSRC": {
            "value": "CPU_1X"
          },
          "PCW_TTC0_CLK1_PERIPHERAL_DIVISOR0": {
            "value": "1"
          },
          "PCW_TTC0_CLK2_PERIPHERAL_CLKSRC": {
            "value": "CPU_1X"
          },
          "PCW_TTC0_CLK2_PERIPHERAL_DIVISOR0": {
            "value": "1"
          },
          "PCW_TTC0_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_TTC1_CLK0_PERIPHERAL_CLKSRC": {
            "value": "CPU_1X"
          },
          "PCW_TTC1_CLK0_PERIPHERAL_DIVISOR0": {
            "value": "1"
          },
          "PCW_TTC1_CLK1_PERIPHERAL_CLKSRC": {
            "value": "CPU_1X"
          },
          "PCW_TTC1_CLK1_PERIPHERAL_DIVISOR0": {
            "value": "1"
          },
          "PCW_TTC1_CLK2_PERIPHERAL_CLKSRC": {
            "value": "CPU_1X"
          },
          "PCW_TTC1_CLK2_PERIPHERAL_DIVISOR0": {
            "value": "1"
          },
          "PCW_TTC1_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_UART0_BASEADDR": {
            "value": "0xE0000000"
          },
          "PCW_UART0_BAUD_RATE": {
            "value": "115200"
          },
          "PCW_UART0_GRP_FULL_ENABLE": {
            "value": "0"
          },
          "PCW_UART0_HIGHADDR": {
            "value": "0xE0000FFF"
          },
          "PCW_UART0_PERIPHERAL_ENABLE": {
            "value": "1"
          },
          "PCW_UART0_UART0_IO": {
            "value": "MIO 50 .. 51"
          },
          "PCW_UART1_BASEADDR": {
            "value": "0xE0001000"
          },
          "PCW_UART1_BAUD_RATE": {
            "value": "115200"
          },
          "PCW_UART1_GRP_FULL_ENABLE": {
            "value": "0"
          },
          "PCW_UART1_HIGHADDR": {
            "value": "0xE0001FFF"
          },
          "PCW_UART1_PERIPHERAL_ENABLE": {
            "value": "1"
          },
          "PCW_UART1_UART1_IO": {
            "value": "EMIO"
          },
          "PCW_UART_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_UART_PERIPHERAL_FREQMHZ": {
            "value": "100"
          },
          "PCW_UART_PERIPHERAL_VALID": {
            "value": "1"
          },
          "PCW_UIPARAM_ACT_DDR_FREQ_MHZ": {
            "value": "533.333374"
          },
          "PCW_UIPARAM_DDR_ADV_ENABLE": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_AL": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_BL": {
            "value": "8"
          },
          "PCW_UIPARAM_DDR_BOARD_DELAY0": {
            "value": "0.25"
          },
          "PCW_UIPARAM_DDR_BOARD_DELAY1": {
            "value": "0.25"
          },
          "PCW_UIPARAM_DDR_BOARD_DELAY2": {
            "value": "0.25"
          },
          "PCW_UIPARAM_DDR_BOARD_DELAY3": {
            "value": "0.25"
          },
          "PCW_UIPARAM_DDR_BUS_WIDTH": {
            "value": "32 Bit"
          },
          "PCW_UIPARAM_DDR_CLOCK_0_LENGTH_MM": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_CLOCK_0_PACKAGE_LENGTH": {
            "value": "137.1865"
          },
          "PCW_UIPARAM_DDR_CLOCK_0_PROPOGATION_DELAY": {
            "value": "160"
          },
          "PCW_UIPARAM_DDR_CLOCK_1_LENGTH_MM": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_CLOCK_1_PACKAGE_LENGTH": {
            "value": "137.1865"
          },
          "PCW_UIPARAM_DDR_CLOCK_1_PROPOGATION_DELAY": {
            "value": "160"
          },
          "PCW_UIPARAM_DDR_CLOCK_2_LENGTH_MM": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_CLOCK_2_PACKAGE_LENGTH": {
            "value": "137.1865"
          },
          "PCW_UIPARAM_DDR_CLOCK_2_PROPOGATION_DELAY": {
            "value": "160"
          },
          "PCW_UIPARAM_DDR_CLOCK_3_LENGTH_MM": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_CLOCK_3_PACKAGE_LENGTH": {
            "value": "137.1865"
          },
          "PCW_UIPARAM_DDR_CLOCK_3_PROPOGATION_DELAY": {
            "value": "160"
          },
          "PCW_UIPARAM_DDR_CLOCK_STOP_EN": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_DQS_0_LENGTH_MM": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_DQS_0_PACKAGE_LENGTH": {
            "value": "97.9265"
          },
          "PCW_UIPARAM_DDR_DQS_0_PROPOGATION_DELAY": {
            "value": "160"
          },
          "PCW_UIPARAM_DDR_DQS_1_LENGTH_MM": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_DQS_1_PACKAGE_LENGTH": {
            "value": "119.8725"
          },
          "PCW_UIPARAM_DDR_DQS_1_PROPOGATION_DELAY": {
            "value": "160"
          },
          "PCW_UIPARAM_DDR_DQS_2_LENGTH_MM": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_DQS_2_PACKAGE_LENGTH": {
            "value": "119.076"
          },
          "PCW_UIPARAM_DDR_DQS_2_PROPOGATION_DELAY": {
            "value": "160"
          },
          "PCW_UIPARAM_DDR_DQS_3_LENGTH_MM": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_DQS_3_PACKAGE_LENGTH": {
            "value": "140.8255"
          },
          "PCW_UIPARAM_DDR_DQS_3_PROPOGATION_DELAY": {
            "value": "160"
          },
          "PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0": {
            "value": "0.0"
          },
          "PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1": {
            "value": "0.0"
          },
          "PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2": {
            "value": "0.0"
          },
          "PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3": {
            "value": "0.0"
          },
          "PCW_UIPARAM_DDR_DQ_0_LENGTH_MM": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_DQ_0_PACKAGE_LENGTH": {
            "value": "104.762"
          },
          "PCW_UIPARAM_DDR_DQ_0_PROPOGATION_DELAY": {
            "value": "160"
          },
          "PCW_UIPARAM_DDR_DQ_1_LENGTH_MM": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_DQ_1_PACKAGE_LENGTH": {
            "value": "122.158"
          },
          "PCW_UIPARAM_DDR_DQ_1_PROPOGATION_DELAY": {
            "value": "160"
          },
          "PCW_UIPARAM_DDR_DQ_2_LENGTH_MM": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_DQ_2_PACKAGE_LENGTH": {
            "value": "124.95"
          },
          "PCW_UIPARAM_DDR_DQ_2_PROPOGATION_DELAY": {
            "value": "160"
          },
          "PCW_UIPARAM_DDR_DQ_3_LENGTH_MM": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_DQ_3_PACKAGE_LENGTH": {
            "value": "143.8565"
          },
          "PCW_UIPARAM_DDR_DQ_3_PROPOGATION_DELAY": {
            "value": "160"
          },
          "PCW_UIPARAM_DDR_ENABLE": {
            "value": "1"
          },
          "PCW_UIPARAM_DDR_FREQ_MHZ": {
            "value": "533.333333"
          },
          "PCW_UIPARAM_DDR_HIGH_TEMP": {
            "value": "Normal (0-85)"
          },
          "PCW_UIPARAM_DDR_MEMORY_TYPE": {
            "value": "DDR 3"
          },
          "PCW_UIPARAM_DDR_PARTNO": {
            "value": "MT41K256M16 RE-125"
          },
          "PCW_UIPARAM_DDR_TRAIN_DATA_EYE": {
            "value": "1"
          },
          "PCW_UIPARAM_DDR_TRAIN_READ_GATE": {
            "value": "1"
          },
          "PCW_UIPARAM_DDR_TRAIN_WRITE_LEVEL": {
            "value": "1"
          },
          "PCW_UIPARAM_DDR_USE_INTERNAL_VREF": {
            "value": "0"
          },
          "PCW_UIPARAM_GENERATE_SUMMARY": {
            "value": "NONE"
          },
          "PCW_USB0_BASEADDR": {
            "value": "0xE0102000"
          },
          "PCW_USB0_HIGHADDR": {
            "value": "0xE0102fff"
          },
          "PCW_USB0_PERIPHERAL_ENABLE": {
            "value": "1"
          },
          "PCW_USB0_RESET_ENABLE": {
            "value": "1"
          },
          "PCW_USB0_RESET_IO": {
            "value": "MIO 48"
          },
          "PCW_USB0_USB0_IO": {
            "value": "MIO 28 .. 39"
          },
          "PCW_USB1_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_USB_RESET_ENABLE": {
            "value": "1"
          },
          "PCW_USB_RESET_POLARITY": {
            "value": "Active Low"
          },
          "PCW_USB_RESET_SELECT": {
            "value": "Share reset pin"
          },
          "PCW_USE_AXI_FABRIC_IDLE": {
            "value": "0"
          },
          "PCW_USE_AXI_NONSECURE": {
            "value": "0"
          },
          "PCW_USE_CORESIGHT": {
            "value": "0"
          },
          "PCW_USE_CROSS_TRIGGER": {
            "value": "0"
          },
          "PCW_USE_CR_FABRIC": {
            "value": "1"
          },
          "PCW_USE_DDR_BYPASS": {
            "value": "0"
          },
          "PCW_USE_DEBUG": {
            "value": "0"
          },
          "PCW_USE_DEFAULT_ACP_USER_VAL": {
            "value": "1"
          },
          "PCW_USE_DMA0": {
            "value": "0"
          },
          "PCW_USE_DMA1": {
            "value": "0"
          },
          "PCW_USE_DMA2": {
            "value": "0"
          },
          "PCW_USE_DMA3": {
            "value": "0"
          },
          "PCW_USE_EXPANDED_IOP": {
            "value": "0"
          },
          "PCW_USE_FABRIC_INTERRUPT": {
            "value": "0"
          },
          "PCW_USE_HIGH_OCM": {
            "value": "0"
          },
          "PCW_USE_M_AXI_GP0": {
            "value": "1"
          },
          "PCW_USE_M_AXI_GP1": {
            "value": "1"
          },
          "PCW_USE_PROC_EVENT_BUS": {
            "value": "0"
          },
          "PCW_USE_PS_SLCR_REGISTERS": {
            "value": "0"
          },
          "PCW_USE_S_AXI_ACP": {
            "value": "1"
          },
          "PCW_USE_S_AXI_GP0": {
            "value": "1"
          },
          "PCW_USE_S_AXI_GP1": {
            "value": "0"
          },
          "PCW_USE_S_AXI_HP0": {
            "value": "1"
          },
          "PCW_USE_S_AXI_HP1": {
            "value": "0"
          },
          "PCW_USE_S_AXI_HP2": {
            "value": "0"
          },
          "PCW_USE_S_AXI_HP3": {
            "value": "0"
          },
          "PCW_USE_TRACE": {
            "value": "0"
          },
          "PCW_VALUE_SILVERSION": {
            "value": "3"
          },
          "PCW_WDT_PERIPHERAL_CLKSRC": {
            "value": "CPU_1X"
          },
          "PCW_WDT_PERIPHERAL_DIVISOR0": {
            "value": "1"
          },
          "PCW_WDT_PERIPHERAL_ENABLE": {
            "value": "0"
          }
        }
      },
      "smartconnect_0": {
        "vlnv": "xilinx.com:ip:smartconnect:1.0",
        "xci_name": "ps_pcie_smartconnect_0_0",
        "parameters": {
          "NUM_CLKS": {
            "value": "2"
          },
          "NUM_MI": {
            "value": "2"
          },
          "NUM_SI": {
            "value": "1"
          }
        },
        "interface_ports": {
          "S00_AXI": {
            "mode": "Slave",
            "vlnv": "xilinx.com:interface:aximm_rtl:1.0",
            "bridges": [
              "M00_AXI",
              "M01_AXI"
            ],
            "parameters": {
              "NUM_READ_OUTSTANDING": {
                "value": "1"
              },
              "NUM_WRITE_OUTSTANDING": {
                "value": "1"
              }
            }
          },
          "M00_AXI": {
            "mode": "Master",
            "vlnv": "xilinx.com:interface:aximm_rtl:1.0",
            "parameters": {
              "MAX_BURST_LENGTH": {
                "value": "1"
              },
              "NUM_READ_OUTSTANDING": {
                "value": "1"
              },
              "NUM_WRITE_OUTSTANDING": {
                "value": "1"
              },
              "RUSER_BITS_PER_BYTE": {
                "value": "0"
              },
              "SUPPORTS_NARROW_BURST": {
                "value": "0"
              },
              "WUSER_BITS_PER_BYTE": {
                "value": "0"
              }
            }
          },
          "M01_AXI": {
            "mode": "Master",
            "vlnv": "xilinx.com:interface:aximm_rtl:1.0",
            "parameters": {
              "MAX_BURST_LENGTH": {
                "value": "1"
              },
              "NUM_READ_OUTSTANDING": {
                "value": "1"
              },
              "NUM_WRITE_OUTSTANDING": {
                "value": "1"
              },
              "RUSER_BITS_PER_BYTE": {
                "value": "0"
              },
              "SUPPORTS_NARROW_BURST": {
                "value": "0"
              },
              "WUSER_BITS_PER_BYTE": {
                "value": "0"
              }
            }
          }
        }
      },
      "smartconnect_1": {
        "vlnv": "xilinx.com:ip:smartconnect:1.0",
        "xci_name": "ps_pcie_smartconnect_1_0",
        "parameters": {
          "NUM_SI": {
            "value": "1"
          }
        },
        "interface_ports": {
          "S00_AXI": {
            "mode": "Slave",
            "vlnv": "xilinx.com:interface:aximm_rtl:1.0",
            "bridges": [
              "M00_AXI"
            ],
            "parameters": {
              "NUM_READ_OUTSTANDING": {
                "value": "8"
              },
              "NUM_WRITE_OUTSTANDING": {
                "value": "8"
              }
            }
          },
          "M00_AXI": {
            "mode": "Master",
            "vlnv": "xilinx.com:interface:aximm_rtl:1.0",
            "parameters": {
              "MAX_BURST_LENGTH": {
                "value": "16"
              },
              "NUM_READ_OUTSTANDING": {
                "value": "8"
              },
              "NUM_WRITE_OUTSTANDING": {
                "value": "8"
              },
              "RUSER_BITS_PER_BYTE": {
                "value": "0"
              },
              "SUPPORTS_NARROW_BURST": {
                "value": "0"
              },
              "WUSER_BITS_PER_BYTE": {
                "value": "0"
              }
            }
          }
        }
      },
      "xdma_0": {
        "vlnv": "xilinx.com:ip:xdma:4.1",
        "xci_name": "ps_pcie_xdma_0_0",
        "parameters": {
          "PF0_DEVICE_ID_mqdma": {
            "value": "9022"
          },
          "PF2_DEVICE_ID_mqdma": {
            "value": "9022"
          },
          "PF3_DEVICE_ID_mqdma": {
            "value": "9022"
          },
          "axi_bypass_64bit_en": {
            "value": "false"
          },
          "axil_master_64bit_en": {
            "value": "true"
          },
          "axilite_master_en": {
            "value": "true"
          },
          "axilite_master_scale": {
            "value": "Megabytes"
          },
          "axilite_master_size": {
            "value": "1"
          },
          "axist_bypass_en": {
            "value": "true"
          },
          "axist_bypass_size": {
            "value": "16"
          },
          "axisten_freq": {
            "value": "125"
          },
          "cfg_mgmt_if": {
            "value": "false"
          },
          "pcie_extended_tag": {
            "value": "false"
          },
          "pciebar2axibar_axil_master": {
            "value": "0x40000000"
          },
          "pciebar2axibar_axist_bypass": {
            "value": "0x0000000001000000"
          },
          "pf0_device_id": {
            "value": "7022"
          },
          "pf0_interrupt_pin": {
            "value": "INTA"
          },
          "pf0_link_status_slot_clock_config": {
            "value": "true"
          },
          "pf0_msi_enabled": {
            "value": "false"
          },
          "pf0_msix_enabled": {
            "value": "false"
          },
          "pl_link_cap_max_link_speed": {
            "value": "5.0_GT/s"
          },
          "pl_link_cap_max_link_width": {
            "value": "X2"
          },
          "plltype": {
            "value": "QPLL1"
          },
          "soft_reset_en": {
            "value": "false"
          },
          "xdma_axi_intf_mm": {
            "value": "AXI_Stream"
          },
          "xdma_pcie_64bit_en": {
            "value": "true"
          }
        }
      },
      "xlconstant_axcache": {
        "vlnv": "xilinx.com:ip:xlconstant:1.1",
        "xci_name": "ps_pcie_xlconstant_axcache_0",
        "parameters": {
          "CONST_VAL": {
            "value": "0x2"
          },
          "CONST_WIDTH": {
            "value": "4"
          }
        }
      },
      "xlconstant_axlock": {
        "vlnv": "xilinx.com:ip:xlconstant:1.1",
        "xci_name": "ps_pcie_xlconstant_axlock_0",
        "parameters": {
          "CONST_VAL": {
            "value": "0x0"
          },
          "CONST_WIDTH": {
            "value": "2"
          }
        }
      },
      "xlconstant_axprot": {
        "vlnv": "xilinx.com:ip:xlconstant:1.1",
        "xci_name": "ps_pcie_xlconstant_axprot_0",
        "parameters": {
          "CONST_VAL": {
            "value": "0x0"
          },
          "CONST_WIDTH": {
            "value": "3"
          }
        }
      }
    },
    "interface_nets": {
      "xdma_0_pcie_mgt": {
        "interface_ports": [
          "pcie_mgt_0",
          "xdma_0/pcie_mgt"
        ]
      },
      "smartconnect_0_M01_AXI": {
        "interface_ports": [
          "axi_uartlite_0/S_AXI",
          "smartconnect_0/M01_AXI"
        ]
      },
      "xdma_0_M_AXI_LITE": {
        "interface_ports": [
          "smartconnect_0/S00_AXI",
          "xdma_0/M_AXI_LITE"
        ]
      },
      "xdma_0_M_AXIS_H2C_0": {
        "interface_ports": [
          "xdma_0/M_AXIS_H2C_0",
          "xdma_0/S_AXIS_C2H_0"
        ]
      },
      "smartconnect_1_M00_AXI": {
        "interface_ports": [
          "ps7/S_AXI_HP0",
          "smartconnect_1/M00_AXI"
        ]
      },
      "xdma_0_M_AXI_BYPASS": {
        "interface_ports": [
          "smartconnect_1/S00_AXI",
          "xdma_0/M_AXI_BYPASS"
        ]
      },
      "smartconnect_0_M00_AXI": {
        "interface_ports": [
          "M00_AXI_0",
          "smartconnect_0/M00_AXI"
        ]
      },
      "processing_system7_0_FIXED_IO": {
        "interface_ports": [
          "FIXED_IO",
          "ps7/FIXED_IO"
        ]
      },
      "processing_system7_0_DDR": {
        "interface_ports": [
          "DDR",
          "ps7/DDR"
        ]
      }
    },
    "nets": {
      "aclk1_0_1": {
        "ports": [
          "aclk1_0",
          "smartconnect_0/aclk1"
        ]
      },
      "axi_uartlite_0_tx": {
        "ports": [
          "axi_uartlite_0/tx",
          "ps7/UART1_RX"
        ]
      },
      "pcie_rst_n_1": {
        "ports": [
          "pcie_rst_n",
          "xdma_0/sys_rst_n"
        ]
      },
      "processing_system7_0_UART1_TX": {
        "ports": [
          "ps7/UART1_TX",
          "axi_uartlite_0/rx"
        ]
      },
      "ps_7_FCLK_CLK0": {
        "ports": [
          "ps7/FCLK_CLK0",
          "ps7/M_AXI_GP0_ACLK",
          "ps7/S_AXI_ACP_ACLK",
          "ps7/S_AXI_GP0_ACLK"
        ]
      },
      "ps_7_FCLK_CLK1": {
        "ports": [
          "ps7/FCLK_CLK1",
          "ps7/M_AXI_GP1_ACLK"
        ]
      },
      "sys_clk_0_1": {
        "ports": [
          "pcie_clk",
          "xdma_0/sys_clk"
        ]
      },
      "usr_irq_req_0_1": {
        "ports": [
          "usr_irq_req_0",
          "xdma_0/usr_irq_req"
        ]
      },
      "xdma_0_axi_aclk": {
        "ports": [
          "xdma_0/axi_aclk",
          "axi_uartlite_0/s_axi_aclk",
          "ps7/S_AXI_HP0_ACLK",
          "smartconnect_0/aclk",
          "smartconnect_1/aclk"
        ]
      },
      "xdma_0_axi_aresetn": {
        "ports": [
          "xdma_0/axi_aresetn",
          "axi_uartlite_0/s_axi_aresetn",
          "smartconnect_0/aresetn",
          "smartconnect_1/aresetn"
        ]
      },
      "xdma_0_user_lnk_up": {
        "ports": [
          "xdma_0/user_lnk_up",
          "user_lnk_up_0"
        ]
      },
      "xdma_0_usr_irq_ack": {
        "ports": [
          "xdma_0/usr_irq_ack",
          "usr_irq_ack_0"
        ]
      },
      "xlconstant_axcache_dout": {
        "ports": [
          "xlconstant_axcache/dout",
          "ps7/S_AXI_HP0_ARCACHE",
          "ps7/S_AXI_HP0_AWCACHE"
        ]
      },
      "xlconstant_axlock_dout": {
        "ports": [
          "xlconstant_axlock/dout",
          "ps7/S_AXI_HP0_ARLOCK",
          "ps7/S_AXI_HP0_AWLOCK"
        ]
      },
      "xlconstant_axprot_dout": {
        "ports": [
          "xlconstant_axprot/dout",
          "ps7/S_AXI_HP0_ARPROT",
          "ps7/S_AXI_HP0_AWPROT"
        ]
      }
    },
    "addressing": {
      "/": {
        "memory_maps": {
          "M00_AXI_0": {
            "address_blocks": {
              "Reg": {
                "base_address": "0",
                "range": "64K",
                "width": "32",
                "usage": "register"
              }
            }
          }
        }
      },
      "/ps7": {
        "address_spaces": {
          "Data": {
            "range": "4G",
            "width": "32"
          }
        }
      },
      "/xdma_0": {
        "address_spaces": {
          "M_AXI_LITE": {
            "range": "4G",
            "width": "32",
            "segments": {
              "SEG_M00_AXI_0_Reg": {
                "address_block": "/M00_AXI_0/Reg",
                "offset": "0x40000000",
                "range": "512K"
              },
              "SEG_axi_uartlite_0_Reg": {
                "address_block": "/axi_uartlite_0/S_AXI/Reg",
                "offset": "0x40080000",
                "range": "64K"
              }
            }
          },
          "M_AXI_BYPASS": {
            "range": "16E",
            "width": "32",
            "segments": {
              "SEG_ps7_HP0_DDR_LOWOCM": {
                "address_block": "/ps7/S_AXI_HP0/HP0_DDR_LOWOCM",
                "offset": "0x0000000001000000",
                "range": "16M"
              }
            }
          }
        }
      }
    }
  }
}