# From directory ../../wr-cores/syn/spec7_write_design
# hdlmake list-files > proj_file_list.txt

#../top/ip/processing_system7_0/processing_system7_0.xci
../top/arm_base_sys.vhd
../top/arm_base_sys.xdc


# include hardware version ID un FPGA USER_ID register:
hdl_version.xdc
