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Simple PCIe FMC carrier SPEC
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Simple PCIe FMC carrier SPEC
Issues
Open
29
Closed
25
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54
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V4 - Make hardwired PLL settings configurable
#22
· opened
Jul 24, 2014
by
Erik van der Bij
feature
0
updated
Mar 22, 2024
V4 - consider placing fan instead of the cutout under FMC
#20
· opened
Sep 19, 2014
by
Tomasz Wlostowski
feature
0
updated
Oct 13, 2023
PTS: timing violation in DAC signal.
#19
· opened
Sep 22, 2014
by
Erik van der Bij
feature
0
updated
Aug 24, 2023
V4 - consider adding a header with power and user-defined FPGA pins.
#18
· opened
Sep 24, 2014
by
Tomasz Wlostowski
feature
0
updated
Jul 24, 2023
V4 - front-panel drawing does not show licenced under CERN OHL.
#11
· opened
May 29, 2017
by
Erik van der Bij
feature
0
updated
Jan 19, 2023
V4 - Package type D1,D2 wrongly mentioned in BOM. Partnumber OK.
#4
· opened
Nov 08, 2017
by
Erik van der Bij
feature
1
updated
Nov 09, 2022
Panel fiducials have offset
#2
· opened
Jan 22, 2018
by
Erik van der Bij
feature
1
updated
Nov 08, 2022
MAC address and storage
#67
· opened
Jun 10, 2011
by
Erik van der Bij
feature
6
updated
Apr 06, 2020
V4 - Exposed pads IC5 and IC17 (TPS51200DRCT) not connected
#105
· opened
Dec 09, 2019
by
Erik van der Bij
feature
0
updated
Dec 09, 2019
V4 - Note on DAC output range wrong
#15
· opened
Jul 23, 2015
by
Erik van der Bij
feature
2
updated
Feb 15, 2019
Take into account simplification hints from Gennum Field Application Engineer
#101
· opened
Oct 19, 2010
by
Erik van der Bij
feature
2
updated
Feb 12, 2019
V4 - PCB Via annular ring size too small for IPC Class 3
#57
· opened
Sep 15, 2011
by
Erik van der Bij
feature
0
updated
Feb 12, 2019
V4 - Typo in schematic
#56
· opened
Sep 15, 2011
by
Erik van der Bij
feature
0
updated
Feb 12, 2019
V4 - Still OHL 1.0 in a production doc
#55
· opened
Sep 20, 2011
by
Erik van der Bij
feature
0
updated
Feb 12, 2019
V4 - Annular ring PTH for capacitors may be made larger?
#51
· opened
Dec 02, 2011
by
Erik van der Bij
feature
0
updated
Feb 12, 2019
V4 - Move capacitor to cooler area to improve reliability
#49
· opened
Dec 13, 2011
by
Erik van der Bij
feature
1
updated
Feb 12, 2019
V4 - update data for Si570
#48
· opened
Mar 26, 2012
by
Erik van der Bij
feature
0
updated
Feb 12, 2019
V4 - Order number of PCIe bracket not clear
#45
· opened
Apr 25, 2012
by
Erik van der Bij
feature
0
updated
Feb 12, 2019
V4 - Decoupling done different than Xilinx AN
#43
· opened
May 23, 2012
by
Erik van der Bij
feature
0
updated
Feb 12, 2019
V4 - Line impedances should be verified
#42
· opened
May 23, 2012
by
Erik van der Bij
feature
3
updated
Feb 12, 2019
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