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Simple PCIe FMC carrier SPEC
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  • #15

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Opened Jul 23, 2015 by Erik van der Bij@erikvanderbij
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V4 - Note on DAC output range wrong

Page 2 of the schematics shows a note stating "DAC output range: 0V to 2.5V".
It should read: "DAC output range: 0V to 2.27V".

The DACs use a reference voltage Vref created by the LM336M-2.5/NOPB (IC10). The DAC output maximum is the same as Vref.
As the ADJ pin of the LM336M is connected to ground, the output voltage is typically 120mV lower than nominal (datasheet, Fig.1). The "Reverse Breakdown Voltage" (the output level) can be as low as 2.39V when coming out of the factory. Combined with the adjustment input set to 0V, the final output level may be as low as 2.39-0.12=2.27V, which gives the maximum level of the DAC output.

Actually it is a design error (Vadj should have been left open). We do not want to change this anymore as there are so many designs based on this design (SVEC, SPEXI, WR reference schematics etc.) and we don't want to have any different versions around. The White Rabbit core can handle this limited range, if taken correctly care (i.e. to set the base frequency of the VCXO behind it so that the DAC voltage is around in the middle of the range 0-2.27V). Notably at a high temperature (>50C), the DAC voltage was reaching the high level of this range, resulting that it could not follow the WR clock and unlocked. This will be taken care of in the WR core from V3.0 on.

Thanks INCAA for having found this!

Files

  • DAC.png
  • lm336-2.5-n.pdf
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Reference: project/spec#15