- 23 Nov, 2020 1 commit
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Mamta Shukla authored
The SPI connection to the FLASH has 3 different configuration: FPGA-FLASH, GENNUM-FLASH, GENNUM-FPGA to program the FPGA from the FEC ,GENNUM-FGPA mode is needed, but to use the MTD driver FPGA-FLASH mode is required. Hence, enforce bootsel(GPIO) to FPGA-FLASH mode after firmware is loaded in GENNUM-FPGA mode and before initiating SPI communication & initializing the FPGA through spec_fpga_init(spec_gn412x) , to identify flash chip id from spi-ocores and m25p80 driver. Signed-off-by: Mamta Shukla <mamta.ramendra.shukla@cern.ch> Suggested-by: Federico Vaga <federico.vaga@cern.ch>
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- 16 Nov, 2020 6 commits
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Federico Vaga authored
2.1.3 - 2020-11-16 ================== Added ----- - sw,drv: module parameter to ignore bitstream version check (for development or debug) - sw: the spec-firmware-version tool can dump build-info Fixed ----- - hdl: DMA failures fixed with thight timing constraints
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Federico Vaga authored
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 13 Nov, 2020 3 commits
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Tristan Gingold authored
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Tristan Gingold authored
They were too relaxed, in particular the register sync which is used by FIFOs.
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Tristan Gingold authored
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- 12 Nov, 2020 4 commits
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 09 Nov, 2020 19 commits
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Federico Vaga authored
2.1.2 - 2020-11-09 ================== Fixed ----- - sw: automatize version validation
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Federico Vaga authored
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
2.1.1 - 2020-11-09 ================== Fixed ----- - hdl: report the correct version in spec-golden design
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Federico Vaga authored
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
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Tristan Gingold authored
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Federico Vaga authored
2.1.0 - 2020-11-09 ================== Fixed ----- - hdl: cross-page DMA failure - sw: DMA pool memory leak - sw: fix concurrent DMA tasklet Changed ------- - tst: keep the DMA interface open while testing to avoid continuos memory re-allocation Added ----- - sw: tool to firmware version inspection - sw: FLASH partitions
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Federico Vaga authored
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Tristan Gingold authored
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- 03 Nov, 2020 2 commits
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 02 Nov, 2020 1 commit
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 30 Oct, 2020 4 commits
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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