- 09 Nov, 2020 2 commits
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Tristan Gingold authored
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- 03 Nov, 2020 2 commits
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 02 Nov, 2020 1 commit
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 30 Oct, 2020 4 commits
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 16 Oct, 2020 3 commits
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 14 Oct, 2020 1 commit
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Federico Vaga authored
the tx pointer was not pointing to the last tx_cur because the for loop was overwriting its value. Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 12 Oct, 2020 2 commits
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Federico Vaga authored
One process was able to perform a complete DMA transfer, and communicate the success to the client. Then it would try to schedule the next pending transfer, **but** the client could be fast enough to submit a new request **before** the end of the IRQ handler. This leads to this status: gn412x_dma_schedule_next() is called twice, once from the IRQ handler, once from the client (issue_pending()). In both cases they will see a pending transfer, and they will schedule gn412x_dma_start_task() twice. One will successfully start a new DMA transfer, the other one will fail printing an error. ------8<--------- python3-19944 [002] ....... 15660.640429: spec_fpga_dbg_dma_write <-vfs_write python3-19944 [002] ....... 15660.640898: gn412x_dma_issue_pending <-spec_fpga_dbg_dma_transfer python3-19944 [002] ....... 15660.640898: gn412x_dma_schedule_next <-gn412x_dma_issue_pending ksoftirqd/2-31 [002] .....11 15660.640902: gn412x_dma_start_task <-__tasklet_action.isra.11 irq/17-gn412x-g-5469 [000] ....... 15660.651980: gn412x_dma_irq_handler <-handle_nested_irq python3-19944 [002] ....... 15660.652086: spec_fpga_dbg_dma_read <-vfs_read python3-19944 [002] ....... 15660.652087: gn412x_dma_issue_pending <-spec_fpga_dbg_dma_transfer python3-19944 [002] ....... 15660.652087: gn412x_dma_schedule_next <-gn412x_dma_issue_pending irq/17-gn412x-g-5469 [000] ....... 15660.652089: gn412x_dma_schedule_next <-gn412x_dma_irq_handler ksoftirqd/2-31 [002] .....11 15660.652089: gn412x_dma_start_task <-__tasklet_action.isra.11 ksoftirqd/2-31 [002] .....11 15660.652093: gn412x_dma_start_task <-__tasklet_action.isra.11 ksoftirqd/2-31 [002] .....11 15660.652098: dev_err <-gn412x_dma_start_task irq/17-gn412x-g-5469 [000] ....... 15660.661041: gn412x_dma_irq_handler <-handle_nested_irq irq/17-gn412x-g-5469 [000] ....... 15660.661044: gn412x_dma_schedule_next <-gn412x_dma_irq_handler ------8<--------- [15660.652101] spec_gn412x_dma spec-gn412x-dma.3.auto: Failed to start DMA transfer: channel busy ------8<--------- Signed-off-by: Federico Vaga <federico.vaga@cern.ch> Signed-off-by: Tristan Gingold <tristan.gingold@cern.ch>
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Federico Vaga authored
when checking for ERROR or ABORT what the code was doing was: (ERROR || ABORT) Fix it by applying the mask properly and compere the state value Signed-off-by: Federico Vaga <federico.vaga@cern.ch> Reported-by: Tristan Gingold <tristan.gingold@cern.ch>
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- 02 Oct, 2020 7 commits
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Federico Vaga authored
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 30 Sep, 2020 1 commit
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Federico Vaga authored
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- 29 Sep, 2020 7 commits
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Dimitris Lampridis authored
2.0.2 - 2020-09-29 ================== Fixed ----- - hdl: L2P DMA issues reported with slower hosts
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Dimitris Lampridis authored
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Dimitris Lampridis authored
Signed-off-by: Dimitris Lampridis <dimitris.lampridis@cern.ch>
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Dimitris Lampridis authored
Signed-off-by: Dimitris Lampridis <dimitris.lampridis@cern.ch>
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Dimitris Lampridis authored
Signed-off-by: Dimitris Lampridis <dimitris.lampridis@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 20 Aug, 2020 4 commits
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Federico Vaga authored
2.0.0 - 2020-08-20 ================== Fixed ----- - program 2 or more SPEC FPGAs in parallel. There is a bug in the GN412x chip that we fixed in software by serializing any attempt of parallel programming
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Federico Vaga authored
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Programming cards in parallel does not work quite well. At best the GN412x chip reports errors on all plugged cards. In other cases it freezes the PC. With this patch I am going to serialize the FCL access. Like this cards will be programmed one after the other. I do not know the origin of the bug, but it must be in the GN412x chip. Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 30 Jul, 2020 6 commits
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Federico Vaga authored
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Federico Vaga authored
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Dimitris Lampridis authored
Signed-off-by: Dimitris Lampridis <dimitris.lampridis@cern.ch>
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