Commits · 6bf976cbcb2c67475e478e65faa64e3fd9259eb9 · Projects / Simple PCIe FMC carrier SPEC

08 Jul, 2020 2 commits
- sw|doc: better explaination about the 4KiB write split · 6bf976cb
  Federico Vaga authored Jul 08, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  6bf976cb
- tst: make --bitstream optional · 3164b2c7
  Federico Vaga authored Jul 08, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  3164b2c7
06 Jul, 2020 5 commits
- sw: add tools to measure throughput · e5879288
  Federico Vaga authored Jul 06, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  e5879288
- tst: DMA read throughput test · 5545419e
  Federico Vaga authored Jul 06, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  5545419e
- sw:drv: add parameter to customize DMA allocation · 01547b49
  Federico Vaga authored Jul 06, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  01547b49
- sw:drv: accept the maximum DMA write length · 2a10539c
  Federico Vaga authored Jul 06, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  2a10539c
- sw:drv: delay DMA WRITE completion to overcome a bug · 3fdabb7a
  Federico Vaga authored Jul 06, 2020
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The HDL asserts the IRQ line before the end of a write to DDR transfer.
We can't fix the problem on HDL due to lack of resources, so we add a
5us (empirical tests) delay in software.
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  3fdabb7a
02 Jul, 2020 8 commits
- doc: add DMA chapter · 32659261
  Federico Vaga authored Jul 02, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  32659261
- sw:drv: fix DMA size limitations · 7f6fb421
  Federico Vaga authored Jul 02, 2020
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No limites for read, but the implementation is not symmetric. For
DMA_MEM_TO_DEV the transfer size limitation is 4096.
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  7f6fb421
- fixup! tst: add regression test for 4Byte corruption · a6499126
  Federico Vaga authored Jul 02, 2020
  
  a6499126
- tst: program FPGA before running tests · 7f643fb0
  Federico Vaga authored Jul 02, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  7f643fb0
- fixup! sw:drv: fix bug in computing segments · 67d436d5
  Federico Vaga authored Jul 02, 2020
  
  67d436d5
- sw:py: add method to program the FPGA · ea51ad5e
  Federico Vaga authored Jul 02, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  ea51ad5e
- tst: add regression test for 4Byte corruption · a108596a
  Federico Vaga authored Jul 02, 2020
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Problem: sometimes a 4Byte transfers corrupt the gennum chip
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  a108596a
- tst: add regression test for zero bytes · 6d9fec0e
  Federico Vaga authored Jul 02, 2020
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Problem: after Xbytes the DMA read returns only zeros. This happens at
a power-of-two offset, typically below 1024
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  6d9fec0e
01 Jul, 2020 2 commits
- sw:drv: fix bug in computing segments · 6a86876a
  Federico Vaga authored Jul 01, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  6a86876a
- sw:drv: add necessary header on modern Linux · 64ee0f36
  Federico Vaga authored Jul 01, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  64ee0f36
30 Jun, 2020 19 commits
- Merge branch 'feature/debugfs-dma' into develop · 0d2c60fd
  Federico Vaga authored Jun 30, 2020
  
  0d2c60fd
- ignore clangd files · 282dfa29
  Federico Vaga authored Jun 30, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  282dfa29
- tst: simplify assert message and remove useless assert · 6cd4a336
  Federico Vaga authored Jun 30, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  6cd4a336
- doc: remove empty lines · 44b0a70c
  Federico Vaga authored Jun 30, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  44b0a70c
- sw:py: rename open/close to request/release · 56227886
  Federico Vaga authored Jun 30, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  56227886
- doc: fix typos · 75b976ca
  Federico Vaga authored Jun 30, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  75b976ca
- doc: add PySPEC documentation · 3b053ebe
  Federico Vaga authored Jun 30, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  3b053ebe
- doc: add information about DMA from debugfs · 3bbec72a
  Federico Vaga authored Jun 30, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  3bbec72a
- py: use contextmanager for DMA transfer · a77e93a2
  Federico Vaga authored Jun 30, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  a77e93a2
- sw:drv: add debug print to check DMA parameters · 344c890a
  Federico Vaga authored Jun 30, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  344c890a
- tst: fix unaligned size test · c4e3a399
  Federico Vaga authored Jun 30, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  c4e3a399
- sw:drv: move alignment validation into DMA engine · beb184fc
  Federico Vaga authored Jun 30, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  beb184fc
- tst: review transfer tests · 47fef266
  Federico Vaga authored Jun 30, 2020
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Sorry for the bad commit :D
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  47fef266
- sw:drv: unaligned accesses are not supported · aa01b719
  Federico Vaga authored Jun 30, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  aa01b719
- tst: dedicated test for invalid sizes · 54242b66
  Federico Vaga authored Jun 30, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  54242b66
- sw:drv: remove useless code · f7f92deb
  Federico Vaga authored Jun 30, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  f7f92deb
- tst: add test for zero size buffers · 59adb80d
  Federico Vaga authored Jun 30, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  59adb80d
- tst: regressions are actually true limitations, remove test · 239dde56
  Federico Vaga authored Jun 30, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  239dde56
- sw:py: dma_write returns the number of transfered bytes · bc0b9676
  Federico Vaga authored Jun 29, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  bc0b9676
29 Jun, 2020 1 commit
- sw:py: add DDR alignment constant · c6b97be4
  Federico Vaga authored Jun 29, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  c6b97be4
26 Jun, 2020 3 commits
- tst: add a DMA write and read-back test · 4aa94f09
  Federico Vaga authored Jun 26, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  4aa94f09
- tst: do twice the DMA read and compare · fe1b5c53
  Federico Vaga authored Jun 26, 2020
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We can see if the controller returns random garbage
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  fe1b5c53
- sw:drv: fix NULL pointer bug during ABORT · 83be3241
  Federico Vaga authored Jun 26, 2020
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  83be3241