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Simple PCIe FMC carrier SPEC
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Simple PCIe FMC carrier SPEC
Commits
beb184fc
Commit
beb184fc
authored
Jun 30, 2020
by
Federico Vaga
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sw:drv: move alignment validation into DMA engine
Signed-off-by:
Federico Vaga
<
federico.vaga@cern.ch
>
parent
47fef266
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2 changed files
with
10 additions
and
2 deletions
+10
-2
spec-core-fpga.c
software/kernel/spec-core-fpga.c
+0
-2
spec-gn412x-dma.c
software/kernel/spec-gn412x-dma.c
+10
-0
No files found.
software/kernel/spec-core-fpga.c
View file @
beb184fc
...
@@ -161,8 +161,6 @@ static int spec_fpga_dbg_dma_transfer(struct spec_fpga_dbg_dma *dbgdma,
...
@@ -161,8 +161,6 @@ static int spec_fpga_dbg_dma_transfer(struct spec_fpga_dbg_dma *dbgdma,
struct
scatterlist
*
sg
;
struct
scatterlist
*
sg
;
int
i
;
int
i
;
if
(
count
&
0x3
||
offset
&
0x3
)
return
-
EINVAL
;
max_segment
=
dma_get_max_seg_size
(
dbgdma
->
dchan
->
device
->
dev
)
&
PAGE_MASK
;
max_segment
=
dma_get_max_seg_size
(
dbgdma
->
dchan
->
device
->
dev
)
&
PAGE_MASK
;
err
=
sg_alloc_table
(
&
sgt
,
(
count
/
max_segment
)
+
1
,
GFP_KERNEL
);
err
=
sg_alloc_table
(
&
sgt
,
(
count
/
max_segment
)
+
1
,
GFP_KERNEL
);
...
...
software/kernel/spec-gn412x-dma.c
View file @
beb184fc
...
@@ -144,6 +144,7 @@ enum gn412x_dma_state {
...
@@ -144,6 +144,7 @@ enum gn412x_dma_state {
};
};
#define GN412X_DMA_STAT_ACK BIT(2)
#define GN412X_DMA_STAT_ACK BIT(2)
#define GN412X_DMA_DDR_ALIGN 4
/**
/**
* Transfer descriptor an hardware transfer
* Transfer descriptor an hardware transfer
...
@@ -457,6 +458,12 @@ static struct dma_async_tx_descriptor *gn412x_dma_prep_slave_sg(
...
@@ -457,6 +458,12 @@ static struct dma_async_tx_descriptor *gn412x_dma_prep_slave_sg(
sg_dma_len
(
sg
),
i
);
sg_dma_len
(
sg
),
i
);
goto
err_alloc_pool
;
goto
err_alloc_pool
;
}
}
if
(
sg_dma_len
(
sg
)
&
(
GN412X_DMA_DDR_ALIGN
-
1
))
{
dev_err
(
&
chan
->
dev
->
device
,
"Transfer size must be aligne to %d Bytes, got %d Bytes
\n
"
,
GN412X_DMA_DDR_ALIGN
,
sg_dma_len
(
sg
));
goto
err_alloc_pool
;
}
gn412x_dma_tx
->
sgl_hw
[
i
]
=
dma_pool_alloc
(
gn412x_dma
->
pool
,
gn412x_dma_tx
->
sgl_hw
[
i
]
=
dma_pool_alloc
(
gn412x_dma
->
pool
,
GFP_DMA
,
GFP_DMA
,
&
phys
);
&
phys
);
...
@@ -585,6 +592,9 @@ static int gn412x_dma_slave_config(struct dma_chan *chan,
...
@@ -585,6 +592,9 @@ static int gn412x_dma_slave_config(struct dma_chan *chan,
sizeof
(
struct
dma_slave_config
));
sizeof
(
struct
dma_slave_config
));
spin_unlock_irqrestore
(
&
gn412x_dma_chan
->
lock
,
flags
);
spin_unlock_irqrestore
(
&
gn412x_dma_chan
->
lock
,
flags
);
if
(
gn412x_dma_chan
->
sconfig
.
src_addr
&
(
GN412X_DMA_DDR_ALIGN
-
1
))
return
-
EINVAL
;
return
0
;
return
0
;
}
}
...
...
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