Commit a565215a authored by Federico Vaga's avatar Federico Vaga

Merge branch 'release/v1.4.1'

parents 204ff681 e52fec7c
......@@ -286,7 +286,7 @@ entity spec_base_wr is
tm_dac_wr_o : out std_logic_vector(g_AUX_CLKS-1 downto 0);
tm_clk_aux_lock_en_i : in std_logic_vector(g_AUX_CLKS-1 downto 0) := (others => '0');
tm_clk_aux_locked_o : out std_logic_vector(g_AUX_CLKS-1 downto 0);
-- PPS output
pps_p_o : out std_logic;
pps_led_o : out std_logic;
......@@ -761,7 +761,7 @@ begin -- architecture top
clk_125m_gtp_p_i => clk_125m_gtp_p_i,
clk_aux_i => clk_aux_i,
clk_10m_ext_i => clk_10m_ext,
clk_sys_62m5_o => clk_62m5_sys,
clk_ref_125m_o => clk_125m_ref,
clk_pll_aux_o => clk_pll_aux,
......@@ -833,7 +833,7 @@ begin -- architecture top
tm_time_valid_o => tm_time_valid_o,
tm_tai_o => tm_tai_o,
tm_cycles_o => tm_cycles_o,
tm_dac_value_o => tm_dac_value_o,
tm_dac_wr_o => tm_dac_wr_o,
tm_clk_aux_lock_en_i => tm_clk_aux_lock_en_i,
......@@ -1011,10 +1011,21 @@ begin -- architecture top
-- DDR3 controller
gen_with_ddr: if g_WITH_DDR generate
function get_ddr3_bank_port_select return string is
begin
case g_DDR_DATA_SIZE is
when 32 => return "SPEC_BANK3_32B_32B";
when 64 => return "SPEC_BANK3_64B_32B";
when others =>
assert false report "Invalid g_DDR_DATA_SIZE" severity error;
return "error";
end case;
end get_ddr3_bank_port_select;
begin
cmp_ddr_ctrl_bank3 : entity work.ddr3_ctrl
generic map(
g_RST_ACT_LOW => 0, -- active high reset (simpler internal logic)
g_BANK_PORT_SELECT => "SPEC_BANK3_64B_32B",
g_BANK_PORT_SELECT => get_ddr3_bank_port_select,
g_MEMCLK_PERIOD => 3000,
g_SIMULATION => boolean'image(g_SIMULATION),
g_CALIB_SOFT_IP => "TRUE",
......
......@@ -519,7 +519,7 @@ static int gn412x_fcl_probe(struct platform_device *pdev)
struct resource *r;
int err;
gn412x = devm_kzalloc(&pdev->dev, sizeof(*gn412x), GFP_KERNEL);
gn412x = kzalloc(sizeof(*gn412x), GFP_KERNEL);
if (!gn412x)
return -ENOMEM;
platform_set_drvdata(pdev, gn412x);
......@@ -530,7 +530,7 @@ static int gn412x_fcl_probe(struct platform_device *pdev)
err = -EINVAL;
goto err_res_mem;
}
gn412x->mem = devm_ioremap(&pdev->dev, r->start, resource_size(r));
gn412x->mem = ioremap(r->start, resource_size(r));
if (!gn412x->mem) {
err = -EADDRNOTAVAIL;
goto err_map;
......@@ -558,10 +558,12 @@ err_fpga_reg:
compat_fpga_mgr_free(gn412x->mgr);
err_fpga_create:
gn4124_dbg_exit(pdev);
devm_iounmap(&pdev->dev, gn412x->mem);
iounmap(gn412x->mem);
err_map:
err_res_mem:
devm_kfree(&pdev->dev, gn412x);
kfree(gn412x);
platform_set_drvdata(pdev, NULL);
return err;
}
......@@ -569,15 +571,19 @@ static int gn412x_fcl_remove(struct platform_device *pdev)
{
struct gn412x_fcl_dev *gn412x = platform_get_drvdata(pdev);
gn4124_dbg_exit(pdev);
if (!gn412x->mgr)
return -ENODEV;
compat_fpga_mgr_unregister(gn412x->mgr);
compat_fpga_mgr_free(gn412x->mgr);
gn4124_dbg_exit(pdev);
iounmap(gn412x->mem);
kfree(gn412x);
platform_set_drvdata(pdev, NULL);
dev_dbg(&pdev->dev, "%s\n", __func__);
return 0;
}
......
......@@ -476,7 +476,7 @@ static int gn412x_gpio_probe(struct platform_device *pdev)
struct resource *r;
int err;
gn412x = devm_kzalloc(&pdev->dev, sizeof(*gn412x), GFP_KERNEL);
gn412x = kzalloc(sizeof(*gn412x), GFP_KERNEL);
if (!gn412x)
return -ENOMEM;
......@@ -488,7 +488,7 @@ static int gn412x_gpio_probe(struct platform_device *pdev)
err = -EINVAL;
goto err_res_mem;
}
gn412x->mem = devm_ioremap(&pdev->dev, r->start, resource_size(r));
gn412x->mem = ioremap(r->start, resource_size(r));
if (!gn412x->mem) {
err = -EADDRNOTAVAIL;
goto err_map;
......@@ -552,10 +552,10 @@ err_req:
err_add_irq:
gpiochip_remove(&gn412x->gpiochip);
err_add:
devm_iounmap(&pdev->dev, gn412x->mem);
iounmap(gn412x->mem);
err_map:
err_res_mem:
devm_kfree(&pdev->dev, gn412x);
kfree(gn412x);
return err;
}
......@@ -563,6 +563,7 @@ static int gn412x_gpio_remove(struct platform_device *pdev)
{
struct gn412x_gpio_dev *gn412x = platform_get_drvdata(pdev);
gn412x_dbg_exit(gn412x);
gn412x_gpio_int_cfg_disable(gn412x);
......@@ -570,6 +571,8 @@ static int gn412x_gpio_remove(struct platform_device *pdev)
free_irq(platform_get_irq(pdev, 0), gn412x);
gn412x_gpio_irq_set_nested_thread_all(gn412x, false);
gpiochip_remove(&gn412x->gpiochip);
iounmap(gn412x->mem);
kfree(gn412x);
dev_dbg(&pdev->dev, "%s\n", __func__);
return 0;
......
......@@ -46,6 +46,7 @@ static int fpga_mgr_dev_match(struct device *dev, const void *data)
return dev->parent == data;
}
#define FPGA_CLASS "fpga_mgr_class"
/**
* fpga_mgr_get - get an exclusive reference to a fpga mgr
* @dev:parent device that fpga mgr was registered with
......@@ -56,10 +57,12 @@ static int fpga_mgr_dev_match(struct device *dev, const void *data)
*/
struct fpga_manager *fpga_mgr_get(struct device *dev)
{
struct class *fpga_mgr_class = (struct class *) kallsyms_lookup_name("fpga_mgr_class");
struct class *fpga_mgr_class;
struct device *mgr_dev;
mgr_dev = class_find_device(fpga_mgr_class, NULL, dev, fpga_mgr_dev_match);
fpga_mgr_class = (struct class *) kallsyms_lookup_name(FPGA_CLASS);
mgr_dev = class_find_device(fpga_mgr_class, NULL, dev,
fpga_mgr_dev_match);
if (!mgr_dev)
return ERR_PTR(-ENODEV);
......
......@@ -93,7 +93,7 @@ static int spec_fpga_dbg_bld_info(struct seq_file *s, void *offset)
}
for (off = SPEC_BASE_REGS_BUILDINFO;
off < SPEC_BASE_REGS_BUILDINFO + SPEC_BASE_REGS_BUILDINFO_SIZE -1;
off < SPEC_BASE_REGS_BUILDINFO + SPEC_BASE_REGS_BUILDINFO_SIZE - 1;
off++) {
char tmp = ioread8(spec_fpga->fpga + off);
......@@ -113,7 +113,7 @@ static int spec_fpga_dbg_bld_info_open(struct inode *inode,
return single_open(file, spec_fpga_dbg_bld_info, spec);
}
static const struct file_operations spec_fpga_dbg_bld_info_ops = {
static const struct file_operations spec_fpga_dbg_bld_ops = {
.owner = THIS_MODULE,
.open = spec_fpga_dbg_bld_info_open,
.read = seq_read,
......@@ -151,12 +151,13 @@ static int spec_fpga_dbg_init(struct spec_fpga *spec_fpga)
goto err;
}
spec_fpga->dbg_bld_info = debugfs_create_file(SPEC_DBG_BLD_INFO_NAME, 0444,
spec_fpga->dbg_dir_fpga,
spec_fpga,
&spec_fpga_dbg_bld_info_ops);
if (IS_ERR_OR_NULL(spec_fpga->dbg_bld_info)) {
err = PTR_ERR(spec_fpga->dbg_bld_info);
spec_fpga->dbg_bld = debugfs_create_file(SPEC_DBG_BLD_INFO_NAME,
0444,
spec_fpga->dbg_dir_fpga,
spec_fpga,
&spec_fpga_dbg_bld_ops);
if (IS_ERR_OR_NULL(spec_fpga->dbg_bld)) {
err = PTR_ERR(spec_fpga->dbg_bld);
dev_err(&spec_fpga->dev,
"Cannot create debugfs file \"%s\" (%d)\n",
SPEC_DBG_BLD_INFO_NAME, err);
......@@ -190,7 +191,7 @@ static struct resource spec_fpga_vic_res[] = {
.name = "htvic-mem",
.flags = IORESOURCE_MEM,
.start = SPEC_BASE_REGS_VIC,
.end = SPEC_BASE_REGS_VIC + SPEC_BASE_REGS_VIC_SIZE -1,
.end = SPEC_BASE_REGS_VIC + SPEC_BASE_REGS_VIC_SIZE - 1,
}, {
.name = "htvic-irq",
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
......@@ -212,7 +213,7 @@ static int spec_fpga_vic_init(struct spec_fpga *spec_fpga)
if (!(spec_fpga->meta->cap & SPEC_META_CAP_VIC))
return 0;
memcpy(&res, spec_fpga_vic_res, sizeof(spec_fpga_vic_res));
memcpy(&res, spec_fpga_vic_res, sizeof(res));
res[0].start += pci_start;
res[0].end += pci_start;
res[1].start = gpiod_to_irq(spec_gn412x->gpiod[GN4124_GPIO_IRQ1]);
......@@ -276,11 +277,11 @@ static int spec_fpga_dma_init(struct spec_fpga *spec_fpga)
vic_domain = irq_find_host((void *)&spec_fpga->vic_pdev->dev);
if (!vic_domain) {
dev_err(&spec_fpga->dev,
"Failed to load DMA engine: missing can't find VIC.\n");
"Failed to load DMA engine: can't find VIC\n");
return -ENODEV;
}
memcpy(&res, spec_fpga_dma_res, sizeof(spec_fpga_dma_res));
memcpy(&res, spec_fpga_dma_res, sizeof(res));
res[0].start += pci_start;
res[0].end += pci_start;
res[1].start = irq_find_mapping(vic_domain, SPEC_FPGA_IRQ_DMA_DONE);
......@@ -314,7 +315,8 @@ static struct resource spec_fpga_fmc_i2c_res[] = {
.name = "i2c-ocores-mem",
.flags = IORESOURCE_MEM,
.start = SPEC_BASE_REGS_FMC_I2C,
.end = SPEC_BASE_REGS_FMC_I2C + SPEC_BASE_REGS_FMC_I2C_SIZE -1,
.end = SPEC_BASE_REGS_FMC_I2C +
SPEC_BASE_REGS_FMC_I2C_SIZE - 1,
}, {
.name = "i2c-ocores-irq",
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
......@@ -339,7 +341,8 @@ static struct resource spec_fpga_spi_res[] = {
.name = "spi-ocores-mem",
.flags = IORESOURCE_MEM,
.start = SPEC_BASE_REGS_FLASH_SPI,
.end = SPEC_BASE_REGS_FLASH_SPI + SPEC_BASE_REGS_FLASH_SPI_SIZE - 1,
.end = SPEC_BASE_REGS_FLASH_SPI +
SPEC_BASE_REGS_FLASH_SPI_SIZE - 1,
}, {
.name = "spi-ocores-irq",
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
......@@ -357,7 +360,12 @@ struct flash_platform_data spec_flash_pdata = {
static struct spi_board_info spec_fpga_spi_devices_info[] = {
{
.modalias = "m25p32",
.modalias = "m25p32", /*
* just informative: sometimes we have
* other chips, but the m25p80 driver
* takes care of identifying the correct
* memory
*/
.max_speed_hz = SPEC_FPGA_WB_CLK_HZ / 128,
.chip_select = 0,
.platform_data = &spec_flash_pdata,
......@@ -456,14 +464,14 @@ static ssize_t temperature_show(struct device *dev,
struct spec_fpga *spec_fpga = to_spec_fpga(dev);
if (spec_fpga->meta->cap & SPEC_META_CAP_THERM) {
uint32_t temp = ioread32(spec_fpga->fpga + SPEC_FPGA_THERM_TEMP);
uint32_t temp;
temp = ioread32(spec_fpga->fpga + SPEC_FPGA_THERM_TEMP);
return snprintf(buf, PAGE_SIZE, "%d.%d C\n",
temp / 16, (temp & 0xF) * 1000 / 16);
} else {
return snprintf(buf, PAGE_SIZE, "-.- C\n");
}
return snprintf(buf, PAGE_SIZE, "-.- C\n");
}
static DEVICE_ATTR_RO(temperature);
......@@ -474,14 +482,14 @@ static ssize_t serial_number_show(struct device *dev,
struct spec_fpga *spec_fpga = to_spec_fpga(dev);
if (spec_fpga->meta->cap & SPEC_META_CAP_THERM) {
uint32_t msb = ioread32(spec_fpga->fpga + SPEC_FPGA_THERM_SERID_MSB);
uint32_t lsb = ioread32(spec_fpga->fpga + SPEC_FPGA_THERM_SERID_LSB);
uint32_t msb, lsb;
msb = ioread32(spec_fpga->fpga + SPEC_FPGA_THERM_SERID_MSB);
lsb = ioread32(spec_fpga->fpga + SPEC_FPGA_THERM_SERID_LSB);
return snprintf(buf, PAGE_SIZE, "0x%08x%08x\n", msb, lsb);
} else {
return snprintf(buf, PAGE_SIZE, "0x----------------\n");
}
return snprintf(buf, PAGE_SIZE, "0x----------------\n");
}
static DEVICE_ATTR_RO(serial_number);
......@@ -570,7 +578,7 @@ static ssize_t reset_app_store(struct device *dev,
return count;
}
static DEVICE_ATTR(reset_app, 0644, reset_app_show, reset_app_store);
static DEVICE_ATTR_RW(reset_app);
static struct attribute *spec_fpga_csr_attrs[] = {
&dev_attr_pcb_rev.attr,
......@@ -684,16 +692,17 @@ static int spec_fpga_app_id_build(struct spec_fpga *spec_fpga,
unsigned long app_off,
char *id, unsigned int size)
{
uint32_t vendor = ioread32be(spec_fpga->fpga + app_off + FPGA_META_VENDOR);
uint32_t device = ioread32be(spec_fpga->fpga + app_off + FPGA_META_DEVICE);
uint32_t vendor, device;
vendor = ioread32be(spec_fpga->fpga + app_off + FPGA_META_VENDOR);
device = ioread32be(spec_fpga->fpga + app_off + FPGA_META_DEVICE);
memset(id, 0, size);
if (vendor == 0xFF000000) {
dev_warn(&spec_fpga->dev, "Vendor UUID not supported yet\n");
return -ENODEV;
} else {
snprintf(id, size, "id:%4phN%4phN", &vendor, &device);
}
snprintf(id, size, "id:%4phN%4phN", &vendor, &device);
return 0;
}
......
......@@ -210,8 +210,8 @@ static void spec_dbg_exit(struct spec_gn412x *spec_gn412x)
/* SPEC GPIO configuration */
static void spec_gpio_fpga_select_set(struct spec_gn412x *spec_gn412x,
enum spec_fpga_select sel)
static void spec_bootsel_set(struct spec_gn412x *spec_gn412x,
enum spec_fpga_select sel)
{
switch (sel) {
case SPEC_FPGA_SELECT_FPGA_FLASH:
......@@ -227,7 +227,7 @@ static void spec_gpio_fpga_select_set(struct spec_gn412x *spec_gn412x,
}
}
static enum spec_fpga_select spec_gpio_fpga_select_get(struct spec_gn412x *spec_gn412x)
static enum spec_fpga_select spec_bootsel_get(struct spec_gn412x *spec_gn412x)
{
enum spec_fpga_select sel = 0;
......@@ -480,12 +480,7 @@ static struct resource gn412x_fcl_res[] = {
.flags = IORESOURCE_MEM,
.start = 0,
.end = 0x1000 - 1,
}, {
.name = "gn412x-fcl-irq",
.flags = IORESOURCE_IRQ,
.start = 0,
.end = 0,
}
},
};
enum spec_mfd_enum {
......@@ -556,9 +551,9 @@ static int spec_fw_load(struct spec_gn412x *spec_gn412x, const char *name)
mutex_lock(&spec_gn412x->mtx);
sel = spec_gpio_fpga_select_get(spec_gn412x);
sel = spec_bootsel_get(spec_gn412x);
spec_gpio_fpga_select_set(spec_gn412x, SPEC_FPGA_SELECT_GN4124_FPGA);
spec_bootsel_set(spec_gn412x, SPEC_FPGA_SELECT_GN4124_FPGA);
err = compat_spec_fw_load(spec_gn412x, name);
if (err)
......@@ -570,7 +565,7 @@ static int spec_fw_load(struct spec_gn412x *spec_gn412x, const char *name)
"FPGA incorrectly programmed %d\n", err);
out:
spec_gpio_fpga_select_set(spec_gn412x, sel);
spec_bootsel_set(spec_gn412x, sel);
mutex_unlock(&spec_gn412x->mtx);
return err;
......@@ -597,7 +592,7 @@ static ssize_t bootselect_store(struct device *dev,
}
mutex_lock(&spec_gn412x->mtx);
spec_gpio_fpga_select_set(spec_gn412x, sel);
spec_bootsel_set(spec_gn412x, sel);
mutex_unlock(&spec_gn412x->mtx);
return count;
......@@ -611,7 +606,7 @@ static ssize_t bootselect_show(struct device *dev,
struct spec_gn412x *spec_gn412x = pci_get_drvdata(pdev);
enum spec_fpga_select sel;
sel = spec_gpio_fpga_select_get(spec_gn412x);
sel = spec_bootsel_get(spec_gn412x);
switch (sel) {
case SPEC_FPGA_SELECT_FPGA_FLASH:
return snprintf(buf, PAGE_SIZE, "fpga-flash\n");
......@@ -625,7 +620,7 @@ static ssize_t bootselect_show(struct device *dev,
return -EINVAL;
}
}
static DEVICE_ATTR(bootselect, 0644, bootselect_show, bootselect_store);
static DEVICE_ATTR_RW(bootselect);
/**
* Load golden bitstream on FGPA
......
// SPDX-License-Identifier: GPL-2.0-or-later
/**
* Copyright (C) 2017 CERN (www.cern.ch)
* Author: Federico Vaga <federico.vaga@vaga.pv.it>
......@@ -20,17 +21,6 @@
#include <linux/debugfs.h>
#include <linux/dma-mapping.h>
/* Kernel functions not exported */
#if 0
/*
* Take it from the sources, like if this driver was part
* of that directory
*/
#include <../drivers/dma/dmaengine.h>
#else
/**
* dma_cookie_complete - complete a descriptor
* @tx: descriptor to complete
......@@ -102,7 +92,6 @@ static inline enum dma_status dma_cookie_status(struct dma_chan *chan,
}
return dma_async_is_complete(cookie, complete, used);
}
#endif
enum gn412x_dma_regs {
......@@ -453,8 +442,8 @@ static struct dma_async_tx_descriptor *gn412x_dma_prep_slave_sg(
gn412x_dma_tx->sg_len = sg_len;
/* Configure the hardware for this transfer */
gn412x_dma_tx->sgl_hw = kcalloc(sizeof(struct gn412x_dma_tx_hw *),
gn412x_dma_tx->sg_len,
gn412x_dma_tx->sgl_hw = kcalloc(gn412x_dma_tx->sg_len,
sizeof(struct gn412x_dma_tx_hw *),
GFP_KERNEL);
if (!gn412x_dma_tx->sgl_hw)
goto err_alloc_sglhw;
......@@ -514,12 +503,13 @@ static struct dma_async_tx_descriptor *gn412x_dma_prep_slave_sg(
tx_hw->attribute);
}
dev_dbg(&chan->dev->device, "%s prepared %p\n", __func__, &gn412x_dma_tx->tx);
dev_dbg(&chan->dev->device, "%s prepared %p\n", __func__,
&gn412x_dma_tx->tx);
return &gn412x_dma_tx->tx;
err_alloc_pool:
while(--i >= 0)
while (--i >= 0)
dma_pool_free(gn412x_dma->pool,
gn412x_dma_tx->sgl_hw[i],
gn412x_dma_tx->tx.phys);
......@@ -551,9 +541,10 @@ static void gn412x_dma_issue_pending(struct dma_chan *chan)
static void gn412x_dma_start_task(unsigned long arg)
{
struct gn412x_dma_chan *chan = (struct gn412x_dma_chan *)arg;
struct gn412x_dma_device *gn412x_dma = to_gn412x_dma_device(chan->chan.device);
struct gn412x_dma_device *gn412x_dma;
unsigned long flags;
gn412x_dma = to_gn412x_dma_device(chan->chan.device);
if (unlikely(gn412x_dma_is_busy(gn412x_dma))) {
dev_err(&gn412x_dma->pdev->dev,
"Failed to start DMA transfer: channel busy\n");
......@@ -600,8 +591,9 @@ static int gn412x_dma_slave_config(struct dma_chan *chan,
static int gn412x_dma_terminate_all(struct dma_chan *chan)
{
struct gn412x_dma_device *gn412x_dma = to_gn412x_dma_device(chan->device);
struct gn412x_dma_device *gn412x_dma;
gn412x_dma = to_gn412x_dma_device(chan->device);
gn412x_dma_ctrl_abort(gn412x_dma);
/* FIXME remove all pending */
if (!gn412x_dma_is_abort(gn412x_dma)) {
......@@ -847,7 +839,7 @@ err_res_mem:
/**
* It removes an instance of the GN4124 DMA engine
* It removes an instance of the GN4124 DMA engine
* @pdev: platform device
*
* @return: 0 on success otherwise a negative error code
......
......@@ -124,7 +124,7 @@ struct spec_fpga {
struct dentry *dbg_csr;
struct debugfs_regset32 dbg_csr_reg;
#define SPEC_DBG_BLD_INFO_NAME "build_info"
struct dentry *dbg_bld_info;
struct dentry *dbg_bld;
};
/**
......
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