Commit 7051bce9 authored by Dimitris Lampridis's avatar Dimitris Lampridis

hdl: re-define and clean-up golden to also include DDR3.

Signed-off-by: Dimitris Lampridis's avatarDimitris Lampridis <dimitris.lampridis@cern.ch>
parent 13368245
*
!.gitignore
!Manifest.py
!*.ucf
!syn_extra_steps.tcl
target = "xilinx"
action = "synthesis"
board = "spec"
# Allow the user to override fetchto using:
# hdlmake -p "fetchto='xxx'"
if locals().get('fetchto', None) is None:
fetchto = "../../ip_cores"
syn_device = "xc6slx45t"
syn_grade = "-3"
syn_device = "xc6slx45t"
syn_grade = "-3"
syn_package = "fgg484"
syn_project = "spec_golden.xise"
syn_tool = "ise"
syn_top = "spec_golden"
syn_project = "spec_golden-45T.xise"
syn_tool = "ise"
syn_top = "spec_golden"
spec_base_ucf = ['onewire', 'spi', 'ddr3']
spec_base_ucf = ['onewire', 'spi']
board = "spec"
ctrls = ["bank3_64b_32b" ]
ctrls = ["bank3_32b_32b" ]
files = [ "buildinfo_pkg.vhd" ]
files = [
"buildinfo_pkg.vhd",
]
modules = {
"local" : [
"../../top/golden", "../../syn/common"
],
"git" : [
"https://ohwr.org/project/wr-cores.git",
"https://ohwr.org/project/general-cores.git",
"https://ohwr.org/project/gn4124-core.git",
"https://ohwr.org/project/ddr3-sp6-core.git",
"../../top/golden",
"../../syn/common",
],
}
# Allow the user to override fetchto using:
# hdlmake -p "fetchto='xxx'"
if locals().get('fetchto', None) is None:
fetchto = "../../ip_cores"
# Do not fail during hdlmake fetch
try:
exec(open(fetchto + "/general-cores/tools/gen_buildinfo.py").read())
......
files = ["spec_golden.vhd"]
modules = {'local': ["../../rtl"]}
# Allow the user to override fetchto using:
# hdlmake -p "fetchto='xxx'"
if locals().get('fetchto', None) is None:
fetchto = "../../ip_cores"
files = [
"spec_golden.vhd",
]
modules = {
"local" : [
"../../rtl",
],
"git" : [
"https://ohwr.org/project/wr-cores.git",
"https://ohwr.org/project/general-cores.git",
"https://ohwr.org/project/gn4124-core.git",
"https://ohwr.org/project/ddr3-sp6-core.git",
],
}
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