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Simple PCIe FMC carrier SPEC
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Simple PCIe FMC carrier SPEC
Commits
26b16bd3
Commit
26b16bd3
authored
Sep 29, 2020
by
Dimitris Lampridis
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Merge branch 'release/2.0.2'
parents
f63c5572
d61a87e8
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3 changed files
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10 additions
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4 deletions
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CHANGELOG.rst
CHANGELOG.rst
+8
-2
gn4124-core
hdl/ip_cores/gn4124-core
+1
-1
spec_base_wr.vhd
hdl/rtl/spec_base_wr.vhd
+1
-1
No files found.
CHANGELOG.rst
View file @
26b16bd3
...
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@@ -6,11 +6,17 @@
Changelog
=========
2.0.
0 - 2020-08-20
2.0.
2 - 2020-09-29
==================
Fixed
-----
- program 2 or more SPEC FPGAs in parallel. There is a bug in the
- hdl: L2P DMA issues reported with slower hosts
2.0.1 - 2020-08-20
==================
Fixed
-----
- sw: program 2 or more SPEC FPGAs in parallel. There is a bug in the
GN412x chip that we fixed in software by serializing any attempt of
parallel programming
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gn4124-core
@
06414d93
Subproject commit
e763762405dd5274d342285dbc64683221f1fb15
Subproject commit
06414d93d446a4e851f8aecd7512eec1b6d1fc4c
hdl/rtl/spec_base_wr.vhd
View file @
26b16bd3
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@@ -604,7 +604,7 @@ begin -- architecture top
metadata_data
<=
x"53504543"
;
when
x"2"
=>
-- Version
metadata_data
<=
x"0200000
0
"
;
metadata_data
<=
x"0200000
2
"
;
when
x"3"
=>
-- BOM
metadata_data
<=
x"fffe0000"
;
...
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