pax_global_header 0000666 0000000 0000000 00000000064 13306476142 0014520 g ustar 00root root 0000000 0000000 52 comment=a85885160c8dc95763ae7613531a3c84fd154862
spec-v0.2.0/ 0000775 0000000 0000000 00000000000 13306476142 0012637 5 ustar 00root root 0000000 0000000 spec-v0.2.0/.gitignore 0000664 0000000 0000000 00000000152 13306476142 0014625 0 ustar 00root root 0000000 0000000 *.o
*.ko
*.mod.c
.*.o.cmd
.*.ko.cmd
*.mod.d
*.o.d
*.tmp
.tmp_versions
modules.order
Module.symvers
\#*
*~
spec-v0.2.0/CHANGELOG 0000664 0000000 0000000 00000000154 13306476142 0014051 0 ustar 00root root 0000000 0000000 # Changelog
## [0.1.0] 2017-11-15
### Added
- Linux Device Driver skeleton
## [0.0.0]
Start the development
spec-v0.2.0/LICENSE 0000664 0000000 0000000 00000043172 13306476142 0013653 0 ustar 00root root 0000000 0000000 GNU GENERAL PUBLIC LICENSE
Version 2, June 1991
Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
Everyone is permitted to copy and distribute verbatim copies
of this license document, but changing it is not allowed.
Preamble
The licenses for most software are designed to take away your
freedom to share and change it. By contrast, the GNU General Public
License is intended to guarantee your freedom to share and change free
software--to make sure the software is free for all its users. This
General Public License applies to most of the Free Software
Foundation's software and to any other program whose authors commit to
using it. (Some other Free Software Foundation software is covered by
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your programs, too.
When we speak of free software, we are referring to freedom, not
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To protect your rights, we need to make restrictions that forbid
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The precise terms and conditions for copying, distribution and
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GNU GENERAL PUBLIC LICENSE
TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
0. This License applies to any program or other work which contains
a notice placed by the copyright holder saying it may be distributed
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Whether that is true depends on what the Program does.
1. You may copy and distribute verbatim copies of the Program's
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and give any other recipients of the Program a copy of this License
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You may charge a fee for the physical act of transferring a copy, and
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when run, you must cause it, when started running for such
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announcement including an appropriate copyright notice and a
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the Program is not required to print an announcement.)
These requirements apply to the modified work as a whole. If
identifiable sections of that work are not derived from the Program,
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Thus, it is not the intent of this section to claim rights or contest
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In addition, mere aggregation of another work not based on the Program
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END OF TERMS AND CONDITIONS
How to Apply These Terms to Your New Programs
If you develop a new program, and you want it to be of the greatest
possible use to the public, the best way to achieve this is to make it
free software which everyone can redistribute and change under these terms.
To do so, attach the following notices to the program. It is safest
to attach them to the start of each source file to most effectively
convey the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.
fmc-spec
Copyright (C) 2017 Federico Vaga
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
Also add information on how to contact you by electronic and paper mail.
If the program is interactive, make it output a short notice like this
when it starts in an interactive mode:
Gnomovision version 69, Copyright (C) year name of author
Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, the commands you use may
be called something other than `show w' and `show c'; they could even be
mouse-clicks or menu items--whatever suits your program.
You should also get your employer (if you work as a programmer) or your
school, if any, to sign a "copyright disclaimer" for the program, if
necessary. Here is a sample; alter the names:
Yoyodyne, Inc., hereby disclaims all copyright interest in the program
`Gnomovision' (which makes passes at compilers) written by James Hacker.
{signature of Ty Coon}, 1 April 1989
Ty Coon, President of Vice
This General Public License does not permit incorporating your program into
proprietary programs. If your program is a subroutine library, you may
consider it more useful to permit linking proprietary applications with the
library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License.
spec-v0.2.0/Makefile 0000664 0000000 0000000 00000000677 13306476142 0014311 0 ustar 00root root 0000000 0000000 # include parent_common.mk for buildsystem's defines
#use absolute path for REPO_PARENT
REPO_PARENT ?= $(shell /bin/pwd)/..
-include $(REPO_PARENT)/parent_common.mk
DIRS = kernel doc
.PHONY: all clean modules install modules_install $(DIRS)
all clean modules install modules_install: $(DIRS)
clean: TARGET = clean
modules: TARGET = modules
install: TARGET = install
modules_install: TARGET = modules_install
$(DIRS):
$(MAKE) -C $@ $(TARGET)
spec-v0.2.0/README.rst 0000664 0000000 0000000 00000001067 13306476142 0014332 0 ustar 00root root 0000000 0000000 .. image:: ./doc/spec-logo.png
SPEC Driver
===========
This is the simplified version of the SPEC driver which only purpose is
to export an interface to enable the users to program their bitstream on
the SPEC FPGA.
Build Sources
=============
There are no special requirements to build the SPEC.
The documentation is written in reStructuredText and it generates HTML files
and man pages. For this you need the python docutils package installed
If the requirements are satified you can run the following commant in
the project root directory:
.. code::
make
spec-v0.2.0/kernel/ 0000775 0000000 0000000 00000000000 13306476142 0014117 5 ustar 00root root 0000000 0000000 spec-v0.2.0/kernel/Kbuild 0000664 0000000 0000000 00000001105 13306476142 0015251 0 ustar 00root root 0000000 0000000 # add versions of supermodule. It is useful when spec is included as sub-module
# of a bigger project that we want to track
ifdef CONFIG_SUPER_REPO
ifdef CONFIG_SUPER_REPO_VERSION
SUBMODULE_VERSIONS += MODULE_INFO(version_$(CONFIG_SUPER_REPO),\"$(CONFIG_SUPER_REPO_VERSION)\");
endif
endif
# add versions of used submodules
ccflags-y += -DADDITIONAL_VERSIONS="$(SUBMODULE_VERSIONS)"
ccflags-y += -DGIT_VERSION=\"$(GIT_VERSION)\"
ccflags-y += -I$(FPGA_MGR_ABS)/include
KBUILD_EXTRA_SYMBOLS += $(FPGA_MGR_ABS)/drivers/fpga/Module.symvers
obj-m := spec.o
spec-objs := spec-core.o
spec-v0.2.0/kernel/Makefile 0000664 0000000 0000000 00000001332 13306476142 0015556 0 ustar 00root root 0000000 0000000 # include parent_common.mk for buildsystem's defines
#use absolute path for REPO_PARENT
REPO_PARENT ?= $(shell /bin/pwd)/../..
-include $(REPO_PARENT)/parent_common.mk
LINUX ?= /lib/modules/$(shell uname -r)/build
FPGA_MGR_ABS ?= $(abspath $(FPGA_MGR))
GIT_VERSION = $(shell git describe --dirty --long --tags)
export GIT_VERSION
all: modules
.PHONY: all modules clean help install modules_install
modules help install modules_install:
$(MAKE) -C $(LINUX) M=$(shell pwd) GIT_VERSION=$(GIT_VERSION) FPGA_MGR_ABS=$(FPGA_MGR_ABS) $@
# be able to run the "clean" rule even if $(LINUX) is not valid
clean:
rm -rf *.o *~ .*.cmd *.ko *.mod.c .tmp_versions Module.symvers \
Module.markers modules.order
spec-v0.2.0/kernel/spec-core.c 0000664 0000000 0000000 00000026315 13306476142 0016152 0 ustar 00root root 0000000 0000000 /*
* Copyright (C) 2017 CERN (www.cern.ch)
* Author: Federico Vaga
*
* Released according to the GNU GPL, version 3
*
* Driver for SPEC (Simple PCI FMC carrier) board.
*/
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include "spec.h"
/* These must be set to choose the FPGA configuration mode */
#define GPIO_BOOTSEL0 15
#define GPIO_BOOTSEL1 14
/**
* It reads a 32bit register from the gennum chip
* @spec spec device instance
* @reg gennum register offset
* Return: a 32bit value
*/
static inline uint32_t gennum_readl(struct spec_dev *spec, int reg)
{
return readl(spec->remap[2] + reg);
}
/**
* It writes a 32bit register to the gennum chip
* @spec spec device instance
* @val a 32bit valure
* @reg gennum register offset
*/
static inline void gennum_writel(struct spec_dev *spec, uint32_t val, int reg)
{
writel(val, spec->remap[2] + reg);
}
static inline uint8_t reverse_bits8(uint8_t x)
{
x = ((x >> 1) & 0x55) | ((x & 0x55) << 1);
x = ((x >> 2) & 0x33) | ((x & 0x33) << 2);
x = ((x >> 4) & 0x0f) | ((x & 0x0f) << 4);
return x;
}
static uint32_t unaligned_bitswap_le32(const uint32_t *ptr32)
{
static uint32_t tmp32;
static uint8_t *tmp8 = (uint8_t *) &tmp32;
static uint8_t *ptr8;
ptr8 = (uint8_t *) ptr32;
*(tmp8 + 0) = reverse_bits8(*(ptr8 + 0));
*(tmp8 + 1) = reverse_bits8(*(ptr8 + 1));
*(tmp8 + 2) = reverse_bits8(*(ptr8 + 2));
*(tmp8 + 3) = reverse_bits8(*(ptr8 + 3));
return tmp32;
}
static inline void gpio_out(struct spec_dev *spec, const uint32_t addr,
const int bit, const int value)
{
uint32_t reg;
reg = gennum_readl(spec, addr);
if(value)
reg |= (1<FPGA configuration mode
* @spec: spec device instance
*/
static void gn4124_gpio_config(struct spec_dev *spec)
{
gpio_out(spec, GNGPIO_DIRECTION_MODE, GPIO_BOOTSEL0, 0);
gpio_out(spec, GNGPIO_DIRECTION_MODE, GPIO_BOOTSEL1, 0);
gpio_out(spec, GNGPIO_OUTPUT_ENABLE, GPIO_BOOTSEL0, 1);
gpio_out(spec, GNGPIO_OUTPUT_ENABLE, GPIO_BOOTSEL1, 1);
gpio_out(spec, GNGPIO_OUTPUT_VALUE, GPIO_BOOTSEL0, 1);
gpio_out(spec, GNGPIO_OUTPUT_VALUE, GPIO_BOOTSEL1, 0);
}
/**
* Initialize the gennum
* @spec: spec device instance
* @last_word_size: last word size in the FPGA bitstream
*
* Return: 0 on success, otherwise a negative error code
*/
static int gn4124_fcl_init(struct spec_dev *spec, int last_word_size)
{
uint32_t ctrl;
int i;
gennum_writel(spec, 0x00, FCL_CLK_DIV);
gennum_writel(spec, 0x40, FCL_CTRL); /* Reset */
i = gennum_readl(spec, FCL_CTRL);
if (i != 0x40) {
printk(KERN_ERR "%s: %i: error\n", __func__, __LINE__);
return -EIO;
}
gennum_writel(spec, 0x00, FCL_CTRL);
gennum_writel(spec, 0x00, FCL_IRQ); /* clear pending irq */
switch(last_word_size) {
case 3: ctrl = 0x116; break;
case 2: ctrl = 0x126; break;
case 1: ctrl = 0x136; break;
case 0: ctrl = 0x106; break;
default: return -EINVAL;
}
gennum_writel(spec, ctrl, FCL_CTRL);
gennum_writel(spec, 0x00, FCL_CLK_DIV); /* again? maybe 1 or 2? */
gennum_writel(spec, 0x00, FCL_TIMER_CTRL); /* "disable FCL timr fun" */
gennum_writel(spec, 0x10, FCL_TIMER_0); /* "pulse width" */
gennum_writel(spec, 0x00, FCL_TIMER_1);
/*
* Set delay before data and clock is applied by FCL
* after SPRI_STATUS is detected being assert.
*/
gennum_writel(spec, 0x08, FCL_TIMER2_0); /* "delay before data/clk" */
gennum_writel(spec, 0x00, FCL_TIMER2_1);
gennum_writel(spec, 0x17, FCL_EN); /* "output enable" */
ctrl |= 0x01; /* "start FSM configuration" */
gennum_writel(spec, ctrl, FCL_CTRL);
return 0;
}
/**
* It notifies the gennum that the configuration is over
* @spec: spec device instance
*/
static void gn4124_fcl_complete(struct spec_dev *spec)
{
gennum_writel(spec, 0x186, FCL_CTRL); /* "last data written" */
}
/**
* It configures the FPGA with the given image
* @spec: spec instance
* @data: FPGA configuration code
* @len: image length in bytes
*
* Return: 0 on success, otherwise a negative error code
*/
static int gn4124_load(struct spec_dev *spec, const void *data, int len)
{
int size32 = (len + 3) >> 2;
int done = 0, wrote = 0, i;
const uint32_t *data32 = data;
while(size32 > 0)
{
/* Check to see if FPGA configuation has error */
i = gennum_readl(spec, FCL_IRQ);
if ( (i & 8) && wrote) {
done = 1;
printk("%s: %i: done after %i\n", __func__, __LINE__,
wrote);
} else if ( (i & 0x4) && !done) {
printk("%s: %i: error after %i\n", __func__, __LINE__,
wrote);
return -EIO;
}
/* Wait until at least 1/2 of the fifo is empty */
while (gennum_readl(spec, FCL_IRQ) & (1<<5))
;
/* Write a few dwords into FIFO at a time. */
for (i = 0; size32 && i < 32; i++) {
gennum_writel(spec, unaligned_bitswap_le32(data32),
FCL_FIFO);
data32++; size32--; wrote++;
}
}
return 0;
}
/**
* After programming, we fix gpio lines so pci can access the flash
*/
static void gn4124_gpio_restore(struct spec_dev *spec)
{
gpio_out(spec, GNGPIO_OUTPUT_VALUE, GPIO_BOOTSEL0, 0);
gpio_out(spec, GNGPIO_OUTPUT_VALUE, GPIO_BOOTSEL1, 0);
gpio_out(spec, GNGPIO_OUTPUT_ENABLE, GPIO_BOOTSEL0, 0);
gpio_out(spec, GNGPIO_OUTPUT_ENABLE, GPIO_BOOTSEL1, 0);
}
/**
* it resets the FPGA
*/
static void gn4124_reset_fpga(struct spec_dev *spec)
{
uint32_t reg;
/* After reprogramming, reset the FPGA using the gennum register */
reg = gennum_readl(spec, GNPCI_SYS_CFG_SYSTEM);
/*
* This _fucking_ register must be written with extreme care,
* becase some fields are "protected" and some are not. *hate*
*/
gennum_writel(spec, (reg & ~0xffff) | 0x3fff, GNPCI_SYS_CFG_SYSTEM);
gennum_writel(spec, (reg & ~0xffff) | 0x7fff, GNPCI_SYS_CFG_SYSTEM);
}
/**
* Wait for the FPGA to be configured and ready
* @spec: device instance
*
* Return: 0 on success,-ETIMEDOUT on failure
*/
static int gn4124_fcl_waitdone(struct spec_dev *spec)
{
unsigned long j;
uint32_t val;
j = jiffies + 2 * HZ;
while (1) {
val = gennum_readl(spec, FCL_IRQ);
/* Done */
if (val & 0x8)
return 0;
/* Fail */
if (val & 0x4)
return -EIO;
/* Timeout */
if (time_after(jiffies, j))
return -ETIMEDOUT;
udelay(100);
}
}
/**
* It writes a 32bit register to the gennum chip according to the given mask
* @spec spec device instance
* @mask bit mask of the bits to actually write
* @val a 32bit valure
* @reg gennum register offset
*/
static inline void gennum_mask_val(struct spec_dev *spec,
uint32_t mask, uint32_t val, int reg)
{
uint32_t v = gennum_readl(spec, reg);
v &= ~mask;
v |= val;
gennum_writel(spec, v, reg);
}
/**
* It configures the gennum chip
* @spec spec device instance
* Return: 0 on success, otherwise a negative errno number
*/
static int gennum_config(struct spec_dev *spec)
{
/* Put our 6 pins to a sane state (4 test points, 2 from FPGA) */
gennum_mask_val(spec, 0xfc0, 0x000, GNGPIO_BYPASS_MODE); /* no AF */
gennum_mask_val(spec, 0xfc0, 0xfc0, GNGPIO_DIRECTION_MODE); /* input */
gennum_writel(spec, 0xffff, GNGPIO_INT_MASK_SET); /* disable */
return 0;
}
static enum fpga_mgr_states spec_fpga_state(struct fpga_manager *mgr)
{
return mgr->state;
}
static int spec_fpga_write_init(struct fpga_manager *mgr,
struct fpga_image_info *info,
const char *buf, size_t count)
{
struct spec_dev *spec = mgr->priv;
int err = 0;
gn4124_gpio_config(spec);
err = gn4124_fcl_init(spec, info->count & 0x3);
if (err < 0)
goto err;
return 0;
err:
gn4124_gpio_restore(spec);
return err;
}
static int spec_fpga_write(struct fpga_manager *mgr, const char *buf, size_t count)
{
struct spec_dev *spec = mgr->priv;
return gn4124_load(spec, buf, count);
}
static int spec_fpga_write_complete(struct fpga_manager *mgr,
struct fpga_image_info *info)
{
struct spec_dev *spec = mgr->priv;
int err;
gn4124_fcl_complete(spec);
err = gn4124_fcl_waitdone(spec);
if (err < 0)
return err;
gn4124_gpio_restore(spec);
gn4124_reset_fpga(spec);
return 0;
}
static void spec_fpga_remove(struct fpga_manager *mgr)
{
/* do nothing */
}
static const struct fpga_manager_ops spec_fpga_ops = {
.initial_header_size = 0,
.state = spec_fpga_state,
.write_init = spec_fpga_write_init,
.write = spec_fpga_write,
.write_complete = spec_fpga_write_complete,
.fpga_remove = spec_fpga_remove,
};
/**
* It releases device resources (`device->release()`)
* @dev Linux device instance
*/
static void spec_release(struct device *dev)
{
struct spec_dev *spec = dev_get_drvdata(dev);
struct pci_dev *pdev = to_pci_dev(dev->parent);
int i;
pci_disable_device(pdev);
pci_set_drvdata(pdev, NULL);
for (i = 0; i < 3; i++) {
if (spec->remap[i])
iounmap(spec->remap[i]);
spec->remap[i] = NULL;
}
kfree(spec);
}
static int spec_probe(struct pci_dev *pdev,
const struct pci_device_id *id)
{
struct spec_dev *spec;
int err, i;
spec = kzalloc(sizeof(struct spec_dev), GFP_KERNEL);
if (!spec)
return -ENOMEM;
dev_set_name(&spec->dev, "spec.%04x",
pdev->bus->number << 8 | PCI_SLOT(pdev->devfn));
spec->dev.parent = &pdev->dev;
spec->dev.release = spec_release;
dev_set_drvdata(&spec->dev, spec);
spin_lock_init(&spec->lock);
/* Remap our 3 bars */
for (i = err = 0; i < 3; i++) {
struct resource *r = pdev->resource + (2 * i);
if (!r->start)
continue;
if (r->flags & IORESOURCE_MEM) {
spec->remap[i] = ioremap(r->start,
r->end + 1 - r->start);
if (!spec->remap[i])
err = -ENOMEM;
}
}
if (err)
goto err_remap;
err = device_register(&spec->dev);
if (err)
goto err_dev_reg;
err =fpga_mgr_register(&spec->dev, dev_name(&spec->dev),
&spec_fpga_ops, spec);
if (err)
goto err_fpga;
/* Enable the PCI device */
pci_set_drvdata(pdev, spec);
err = pci_enable_device(pdev);
if (err)
goto err_enable;
pci_set_master(pdev);
err = gennum_config(spec);
if (err)
goto err_gennum;
return 0;
err_gennum:
pci_disable_device(pdev);
err_enable:
fpga_mgr_unregister(&spec->dev);
err_fpga:
pci_set_drvdata(pdev, NULL);
device_unregister(&spec->dev);
err_dev_reg:
for (i = 0; i < 3; i++) {
if (spec->remap[i])
iounmap(spec->remap[i]);
spec->remap[i] = NULL;
}
err_remap:
kfree(spec);
return err;
}
static void spec_remove(struct pci_dev *pdev)
{
struct spec_dev *spec = pci_get_drvdata(pdev);
fpga_mgr_unregister(&spec->dev);
device_unregister(&spec->dev);
}
static DEFINE_PCI_DEVICE_TABLE(spec_pci_tbl) = {
{PCI_DEVICE(PCI_VENDOR_ID_CERN, PCI_DEVICE_ID_SPEC_45T)},
{PCI_DEVICE(PCI_VENDOR_ID_CERN, PCI_DEVICE_ID_SPEC_100T)},
{0,},
};
static struct pci_driver spec_driver = {
.name = "spec",
.probe = spec_probe,
.remove = spec_remove,
.id_table = spec_pci_tbl,
};
static int __init spec_init(void)
{
return pci_register_driver(&spec_driver);
}
static void __exit spec_exit(void)
{
pci_unregister_driver(&spec_driver);
}
module_init(spec_init);
module_exit(spec_exit);
MODULE_AUTHOR("Federico Vaga ");
MODULE_LICENSE("GPL v2");
MODULE_VERSION(GIT_VERSION);
MODULE_DESCRIPTION("spec driver");
ADDITIONAL_VERSIONS;
spec-v0.2.0/kernel/spec.h 0000664 0000000 0000000 00000006362 13306476142 0015231 0 ustar 00root root 0000000 0000000 /*
* Copyright (C) 2010-2012 CERN (www.cern.ch)
* Author: Alessandro Rubini
*
* Released according to the GNU GPL, version 2 or any later version.
*
* This work is part of the White Rabbit project, a research effort led
* by CERN, the European Institute for Nuclear Research.
*/
#ifndef __SPEC_H__
#define __SPEC_H__
#include
#include
#include
#include
#define PCI_VENDOR_ID_CERN (0x10DC)
#define PCI_DEVICE_ID_SPEC_45T (0x018D)
#define PCI_DEVICE_ID_SPEC_100T (0x01A2)
#define PCI_VENDOR_ID_GENNUM (0x1A39)
#define PCI_DEVICE_ID_GN4124 (0x0004)
#define SPEC_MINOR_MAX (64)
#define SPEC_FLAG_BITS (8)
#define SPEC_FLAG_UNLOCK BIT(0)
/* Registers for GN4124 access */
enum {
/* page 106 */
GNPPCI_MSI_CONTROL = 0x48, /* actually, 3 smaller regs */
GNPPCI_MSI_ADDRESS_LOW = 0x4c,
GNPPCI_MSI_ADDRESS_HIGH = 0x50,
GNPPCI_MSI_DATA = 0x54,
GNPCI_SYS_CFG_SYSTEM = 0x800,
/* page 130 ff */
GNINT_CTRL = 0x810,
GNINT_STAT = 0x814,
GNINT_CFG_0 = 0x820,
GNINT_CFG_1 = 0x824,
GNINT_CFG_2 = 0x828,
GNINT_CFG_3 = 0x82c,
GNINT_CFG_4 = 0x830,
GNINT_CFG_5 = 0x834,
GNINT_CFG_6 = 0x838,
GNINT_CFG_7 = 0x83c,
#define GNINT_CFG(x) (GNINT_CFG_0 + 4 * (x))
/* page 146 ff */
GNGPIO_BASE = 0xA00,
GNGPIO_BYPASS_MODE = GNGPIO_BASE,
GNGPIO_DIRECTION_MODE = GNGPIO_BASE + 0x04, /* 0 == output */
GNGPIO_OUTPUT_ENABLE = GNGPIO_BASE + 0x08,
GNGPIO_OUTPUT_VALUE = GNGPIO_BASE + 0x0C,
GNGPIO_INPUT_VALUE = GNGPIO_BASE + 0x10,
GNGPIO_INT_MASK = GNGPIO_BASE + 0x14, /* 1 == disabled */
GNGPIO_INT_MASK_CLR = GNGPIO_BASE + 0x18, /* irq enable */
GNGPIO_INT_MASK_SET = GNGPIO_BASE + 0x1C, /* irq disable */
GNGPIO_INT_STATUS = GNGPIO_BASE + 0x20,
GNGPIO_INT_TYPE = GNGPIO_BASE + 0x24, /* 1 == level */
GNGPIO_INT_VALUE = GNGPIO_BASE + 0x28, /* 1 == high/rise */
GNGPIO_INT_ON_ANY = GNGPIO_BASE + 0x2C, /* both edges */
/* page 158 ff */
FCL_BASE = 0xB00,
FCL_CTRL = FCL_BASE,
FCL_STATUS = FCL_BASE + 0x04,
FCL_IODATA_IN = FCL_BASE + 0x08,
FCL_IODATA_OUT = FCL_BASE + 0x0C,
FCL_EN = FCL_BASE + 0x10,
FCL_TIMER_0 = FCL_BASE + 0x14,
FCL_TIMER_1 = FCL_BASE + 0x18,
FCL_CLK_DIV = FCL_BASE + 0x1C,
FCL_IRQ = FCL_BASE + 0x20,
FCL_TIMER_CTRL = FCL_BASE + 0x24,
FCL_IM = FCL_BASE + 0x28,
FCL_TIMER2_0 = FCL_BASE + 0x2C,
FCL_TIMER2_1 = FCL_BASE + 0x30,
FCL_DBG_STS = FCL_BASE + 0x34,
FCL_FIFO = 0xE00,
PCI_SYS_CFG_SYSTEM = 0x800
};
/**
* struct spec_dev - SPEC instance
* It describes a SPEC device instance.
* @cdev Char device descriptor
* @dev Linux device instance descriptor
* @flags collection of bit flags
* @remap ioremap of PCI bar 0, 2, 4
* @lock it protects: flags
* @buf buffer where store FPGA bitstreams
* @size buffer size
*/
struct spec_dev {
struct cdev cdev;
struct device dev;
DECLARE_BITMAP(flags, SPEC_FLAG_BITS);
void __iomem *remap[3]; /* ioremap of bar 0, 2, 4 */
struct spinlock lock;
void *buf;
size_t size;
};
/**
* It gets a SPEC device instance
* @ptr pointer to a Linux device instance
* Return: the SPEC device instance correponding to the given Linux device
*/
static inline struct spec_dev *to_spec_dev(struct device *ptr)
{
return container_of(ptr, struct spec_dev, dev);
}
#endif /* __SPEC_H__ */