Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

The code was checking the first LM32 instruction, but it used wrong
endianness.

This fixes the check, but the fix uncovered a bug: the "wrc=1"
parameter was only loading the first card. This fixes the bug
as well but not overwriting the user-provided parameter.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

When handling the interrupt, mask the pending bits with the not-empty
mask, otherwise an unexpected trigger-ready status may overflow the
for loop and eventually oops to panic.

Meanwhile, use a symbolic name for the mask and be more aggressive in
disabling (disable all bits: ho harm done for unimplemented interrupt
sources)
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

This is not really a problem if we have edge-triggered interrupts as
input to the Gennum, but will lock the computer on unload when
experimenting with level-triggered interrupts.

We haven't been able to run Message Signalled Interrupt
reliably, for a quirck in the Gennum chip and the kernel
insisting to configure it according to the standard. So this
adds "use_msi" as a module parameter, disabled by default.
See documentation for details.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

This redoes part of
   0dcf4ed3 kernel/spec-fmc: only enable irq1 from fpga
that I reverted. With this patch I only accept the two interrupt
lines from the FPGA (even if only one is being used),
ignoring the test points.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

This reverts commit 0dcf4ed3.

After this I started having irq problems (missing events) so I'm not sure
it was the right thing to do. Try reverting as a quick solution for me.

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

The period pulse on a channel was designed as a generic "mirror one channel
to another with a predefined delay".

However, on different boards self-stamping has different delays, so
if we are mirroring to ourselves, add the delay to the previous setpoint
instead of using the timestamp we got, so the 8ns difference doesn't
accumulate over time.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

The Gennum manual doesn't say what is the miminum glitch for it to
detect the edge, but this appears to work. I can't be sure, though.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

There's the risk of getting spurious interrupts if the test points are
not connected as I use them, and the same may happen to the unused irq0
pin from the fpga
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>