Improvements after second design review
26 June 2016, 16h - 17h, 774-1-014
Detailed comments on schematics
Top Level Sheet
- The inputs on the lower level hierarchical sheet should be placed on
the right. The outputs on the left.
- Done. It should be said that we are at the limits of the MicroZed. In the 'MicroZed Hardware User Guide':http://microzed.org/sites/default/files/documentations/MicroZed_HW_UG_v1_4.pdf (p.15), it is said that the maximum speed is 950 Mbps.
ADC sheet
- Remove the comment about the issue about the bandwidth which has
been solved
- Done
Power Supplies, part 1
- “Double rectifier bridge to have the right polarity in each cases”.
-> in all cases / in all supply configurations
- Corrected
- Remove the "Broches" which is in french and replace it by "Pins"
- Corrected
- Put a comment to say where the heatsink has to be placed
- Done
Power Supplies, part 2
- U5 pin 1 not connected with a blob to P3V3.
- Done
- Double transistor in a single housing rather special, I assume.
Better to have two separate ones.
- More choices are available in single housing. Done
Miscellaneous
- DS18B20U+ is also a unique ID IC.
- Added a comment about it
- Add a flip flop to one output to reduce the FPGA output jitter. This
flip flop has to be clocked by the sampling clock to be sure that
the output will be synchronized with it.
- Done. Can someone check the connections ? Better to exit the card in differential or single ended ?
Clock Input
- “Place 0 ohm close to the track to avoid creating a stub”. Not clear
as instruction.
- _Replaced by "Make one pad of the 0 ohm resistor overlaping
the
external clock signal's path in order to avoid creating
a stub."_
- _Replaced by "Make one pad of the 0 ohm resistor overlaping
the
- Some components should not be mounted. Mark in schematics and in
BOM. (e.g. R33)
- Done