Multi-channel Time Interval Counter and fine delay generator:f980ad4e808664573cc001d910694dd3abc8f748 commitshttps://ohwr.org/project/r19-tdc-del-a/commits/f980ad4e808664573cc001d910694dd3abc8f7482016-10-18T14:14:16Zhttps://ohwr.org/project/r19-tdc-del-a/commit/f980ad4e808664573cc001d910694dd3abc8f748Gateware and software added2016-10-18T14:14:16ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/ad063dfb7686a33af35719091f9cf875bcb04351Filter Board improvements after review2016-09-07T15:23:35ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/3901f732717f5e18f1f38ea8661221390dbd2c85Some small modifications of the layout of the filter board2016-08-29T08:52:39ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/3f0936ca8207bd9727d059ba941b971b6138b8d9Filter Board Added2016-08-26T10:07:28ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/f910831531fc18b7aa01a1ae1e657cb1eff823a0Improvements after layout review. SMA connectors replaced by through holes ones2016-08-02T15:25:46ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/4a6340f6c0534c10e4a20c663fa2bf5296ea9a86SMA connectors changed2016-07-12T14:17:43ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/07c8d1b46b2a33dcd21b14b4310e53863637ac45FCI added. Tracks length corrected2016-07-12T11:53:24ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/c0da4a80657a8bacb86d6709781133d7f1890fa7Added 3D models (FCI missing)2016-07-11T15:33:46ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/3caa8268a877d0b4811a9e5135bfe58728f1438esmall corrections (path size)2016-07-06T12:32:20ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/7e0c77c5d8f5867cc10489082f27b5436a363ee8modifications of the board and layout (added flip flop)2016-07-05T14:16:07ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/6e3de10559e7c175d9e2056df22e30ba42894dccLocal oscillator added2016-06-07T12:38:31ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/c2e367270407e8e00e472902aa90ebedbeba8425New version of the schematics and python script2016-05-18T05:39:50ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/225328c8717f65deeb07869ac224d12e1f586752Name of one connector pin corrected2016-04-14T07:03:13ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/ceb701c7f02cf0173469466e57cbd2cdcb7688a8Modifications on the layout (solder mask)2016-04-13T10:24:44ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/c94e57b1cf197237cd7fed958f51a7dbf1c75f45Change one package size (DRVDD LDO)2016-04-12T09:56:15ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/3d4a61b10436d518a8b4f452335b0143e5f399fcSchematic changes (added some comments)2016-04-11T12:14:45ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/dc3f0f7154cdb550eedeb1d42eddab3e0f171df7Minor modifications in the layout2016-04-07T15:36:05ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/80fed71e7f44b794a5c0620fec344231bb47ca8fMinor changes2016-04-06T15:28:49ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/4ce67f56e9e567edf6152275d95d2ca619f4fe13Added some corrections2016-04-04T15:30:58ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/faf518243fd61ffd29f3fdcc1ed5150d452ee97dLayout finished, GPIO track length for external connectors not matched2016-04-04T08:14:32ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/611522367990fe7b8846e9bdcbea09683456f2c3Changed the analog part of the layout (vertical SMA) and started to route all...2016-04-01T15:28:32ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/be0f69dcb5952005b6c453f6a2c6a889d28b57ccModification of the ground planes, added capacitors, reroute the differential...2016-03-29T15:24:06ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/575349f79831b7f03dd2dfaa43b0c89ba7d95fdbAdded information about the component selection on the schematics2016-03-23T11:25:06ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/66be2d3e39c75218bdac8366a9825fd2d52ab9c6Finishing the layout, adding test points2016-03-22T16:23:18ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/d30f9d3baf3a05cbbd86a63847c2870e5d47f9ecConnectors connected to bank 34 and bank 35, minor changes2016-03-21T16:17:25ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/cf772072457f2c9b405f30cd809a740ade3d327bLayout modified (One ground, Zedboard rotated)2016-03-18T10:31:35ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/68098f3b899ed4e88b49e5b92f0e95dc94f226e3Changed the schematic. Remove the GNDA. Started a new layout from the beginning2016-03-16T16:06:46ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/e97fe83a0dc084dbd0ce2f025567c3c8b0160fb8PinHeader to FPGA done. FCI schematic component changed2016-03-15T15:17:44ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/9d3c897aa0622e025cf63fb9847b957203efcba4FPGA Connectors added2016-03-14T16:29:13ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/71bff72d9e59d60e27e8b46665281f6635dbf915Minor progress2016-03-11T16:08:57ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/50b13b78c5defa5485a89eb7f5ad30d1caa2a8f8ADCBoard firsts schematics and basic PCB layout2016-03-11T10:45:41ZNicolasnicolas.boucquey@cern.chhttps://ohwr.org/project/r19-tdc-del-a/commit/028f57349a8283ca8b48d6ecb3a09f4a62140c1cInitializing Multi-channel Time Interval Counter and fine delay generator rep...2016-03-11T09:43:48ZNicolasnicolas.boucquey@cern.ch