Commit 7e0c77c5 authored by Nicolas Boucquey's avatar Nicolas Boucquey

modifications of the board and layout (added flip flop)

parent 6e3de105
(module Capacitors_SMD:C_1812 (layer F.Cu) (tedit 5415D8C7)
(descr "Capacitor SMD 1812, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 1812")
(attr smd)
(fp_text reference REF** (at 0 -3) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value C_1812 (at 0 3) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -3.1 -1.85) (end 3.1 -1.85) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.1 1.85) (end 3.1 1.85) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.1 -1.85) (end -3.1 1.85) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.1 -1.85) (end 3.1 1.85) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.8 -1.725) (end -1.8 -1.725) (layer F.SilkS) (width 0.15))
(fp_line (start -1.8 1.725) (end 1.8 1.725) (layer F.SilkS) (width 0.15))
(pad 1 smd rect (at -2.3 0) (size 1 3) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at 2.3 0) (size 1 3) (layers F.Cu F.Paste F.Mask))
(model Capacitors_SMD.3dshapes/C_1812.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MSOP-8 (layer F.Cu) (tedit 574704C3)
(fp_text reference REF** (at -0.03 3.56) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value MSOP-8 (at -0.01 -5.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.4 -1.65) (end -1.4 1.25) (layer F.SilkS) (width 0.15))
(fp_line (start 1.4 -1.65) (end -1.4 -1.65) (layer F.SilkS) (width 0.15))
(fp_line (start 1.4 1.25) (end 1.4 -1.65) (layer F.SilkS) (width 0.15))
(fp_line (start -1.4 1.25) (end 1.4 1.25) (layer F.SilkS) (width 0.15))
(pad 1 smd rect (at -2.15 -1.175) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at 2.15 -1.175) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -2.15 -0.525) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at 2.15 -0.525) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -2.15 0.125) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at 2.15 0.125) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -2.15 0.775) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at 2.15 0.775) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask))
)
(module PJ-075DH-SMT-TR (layer F.Cu) (tedit 573B2276)
(fp_text reference REF** (at 2.41 6.8) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value PJ-075DH-SMT-TR (at 0.01 -4.88) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -2.5 3.6) (end -2.5 -2.4) (layer F.SilkS) (width 0.15))
(fp_line (start 6.5 3.6) (end -2.5 3.6) (layer F.SilkS) (width 0.15))
(fp_line (start 6.5 -2.4) (end 6.5 3.6) (layer F.SilkS) (width 0.15))
(fp_line (start -2.5 -2.4) (end 6.5 -2.4) (layer F.SilkS) (width 0.15))
(pad "" np_thru_hole circle (at 0 0) (size 1.4 1.4) (drill 1.4) (layers *.Cu))
(pad "" np_thru_hole circle (at 4 0) (size 1.4 1.4) (drill 1.4) (layers *.Cu))
(pad 0 smd rect (at -0.25 -3.26) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask))
(pad 0 smd rect (at -0.25 4.42) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at 7.4 0 90) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask))
)
EESchema Schematic File Version 2
LIBS:adcBoard-rescue
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:MyLibrary
LIBS:sma
LIBS:user
LIBS:opendous
LIBS:adcBoard-cache
EELAYER 25 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 12 12
Title "Clock Input"
Date "2016-06-03"
Rev "1"
Comp "Nicolas Boucquey"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
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1 8000 3950
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NoConn ~ 7700 3750
NoConn ~ 7700 3600
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F 3 "" H 6250 4350 50 0000 C CNN
1 6250 4350
1 0 0 -1
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L GND #PWR0194
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F 3 "" H 5950 4350 50 0000 C CNN
1 5950 4350
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U 1 1 5750ABC2
P 5450 4400
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F 3 "" H 5450 4400 50 0000 C CNN
1 5450 4400
1 0 0 -1
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L P3V3 #PWR0196
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1 0 0 -1
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F 0 "D13" V 2550 4650 50 0000 C CNN
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F 3 "file:///C:/Users/boucq/Downloads/AV02-1320EN_DS_HSMS-282x_2014-11-260%20(2).pdf" H 2550 4450 50 0001 C CNN
1 2550 4450
0 1 -1 0
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L GND #PWR0197
U 1 1 57512D89
P 2550 4950
F 0 "#PWR0197" H 2550 4700 50 0001 C CNN
F 1 "GND" H 2550 4800 50 0000 C CNN
F 2 "" H 2550 4950 50 0000 C CNN
F 3 "" H 2550 4950 50 0000 C CNN
1 2550 4950
1 0 0 -1
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Text Notes 8200 850 0 60 ~ 12
FILTA
Text Notes 8800 850 0 60 ~ 12
FILTB
Text Notes 9500 850 0 60 ~ 12
BANDWIDTH
Text Notes 8200 1050 0 60 ~ 0
Low
Text Notes 8200 1200 0 60 ~ 0
High\n
Text Notes 8200 1350 0 60 ~ 0
Low
Text Notes 8200 1500 0 60 ~ 0
High
Text Notes 8850 1050 0 60 ~ 0
Low
Text Notes 8850 1200 0 60 ~ 0
Low
Text Notes 8850 1350 0 60 ~ 0
High
Text Notes 8850 1500 0 60 ~ 0
High
Text Notes 9450 1050 0 60 ~ 0
1200 MHz (Full Bandwidth)
Text Notes 9500 1200 0 60 ~ 0
500 MHz (-3 dB)
Text Notes 9500 1350 0 60 ~ 0
160 MHz (-3 dB)
Text Notes 9500 1500 0 60 ~ 0
50 MHz (-3 dB)
Wire Wire Line
5400 3050 6350 3050
Wire Wire Line
5550 2750 5550 3050
Connection ~ 5550 3050
Wire Wire Line
5850 2750 5850 3050
Connection ~ 5850 3050
Wire Wire Line
6150 2750 6150 3050
Connection ~ 6150 3050
Wire Wire Line
6150 2300 6150 2450
Wire Wire Line
5150 2300 6150 2300
Wire Wire Line
5850 2300 5850 2450
Wire Wire Line
5550 2300 5550 2450
Connection ~ 5850 2300
Wire Wire Line
5150 2300 5150 2450
Connection ~ 5550 2300
Wire Wire Line
4500 3200 6350 3200
Wire Wire Line
3350 3300 6350 3300
Wire Wire Line
3350 2650 3350 3300
Wire Wire Line
2550 2650 3350 2650
Wire Wire Line
4500 2650 4500 3200
Wire Wire Line
4800 2350 4800 3050
Wire Wire Line
2000 2350 4800 2350
Wire Wire Line
2450 3050 2450 2900
Wire Wire Line
3700 3050 3700 2900
Wire Wire Line
3700 2400 3700 2350
Connection ~ 3700 2350
Wire Wire Line
2450 2350 2450 2400
Connection ~ 2450 2350
Wire Wire Line
7700 4150 7850 4150
Wire Wire Line
7850 4150 7850 4300
Wire Wire Line
7700 4050 8000 4050
Wire Wire Line
8000 4050 8000 3950
Wire Wire Line
6350 4150 6250 4150
Wire Wire Line
6250 4150 6250 4350
Wire Wire Line
6350 3550 6000 3550
Wire Wire Line
6350 3750 5950 3750
Wire Wire Line
5950 3750 5950 3900
Wire Wire Line
5950 4200 5950 4350
Wire Wire Line
5450 3550 5450 3850
Wire Wire Line
5450 4150 5450 4400
Connection ~ 5450 3550
Wire Wire Line
2000 2350 2000 2150
Wire Notes Line
8050 900 10800 900
Wire Notes Line
8050 700 10800 700
Wire Notes Line
9250 700 9250 1600
Wire Notes Line
8600 700 8600 1600
Wire Notes Line
8050 1600 10800 1600
Wire Wire Line
8250 3150 7700 3150
Wire Wire Line
7700 3300 8250 3300
Entry Wire Line
9800 2600 9900 2500
Entry Wire Line
9800 3900 9900 3800
Wire Bus Line
9900 2500 9900 3800
Entry Bus Bus
9900 2500 10000 2400
Wire Bus Line
10000 2400 10600 2400
Text Notes 10450 2400 2 60 ~ 0
CLK[0..1]
Text HLabel 10600 2400 2 60 Output ~ 0
CLK[0..1]
Text HLabel 1450 4450 0 60 Input ~ 0
CLK_in
$Comp
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1 4200 6400
1 0 0 -1
$EndComp
Wire Wire Line
4200 6900 4200 7050
$Comp
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F 3 "" H 4200 7050 50 0000 C CNN
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$EndComp
Wire Wire Line
3000 5550 3000 5700
Wire Wire Line
3300 5550 3300 5700
Connection ~ 3000 5550
Wire Wire Line
3600 5550 3600 5700
Connection ~ 3300 5550
Wire Wire Line
4200 5550 4200 5900
Connection ~ 3600 5550
Wire Wire Line
2000 5550 2000 5200
Wire Wire Line
3000 6000 3000 6100
Wire Wire Line
3300 6000 3300 6100
Wire Wire Line
3600 6000 3600 6100
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1 3000 6100
1 0 0 -1
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Wire Wire Line
4950 3850 4950 3550
Connection ~ 4950 3550
Text Notes 2900 4100 0 60 ~ 0
Place 0 ohm close to the track to avoid\ncreating a stub
Text Notes 650 1250 0 50 ~ 0
Copyright CERN 2016.\nThis documentation describes Open Hardware and is licensed under the\nCERN OHL v. 1.2.\nYou may redistribute and modify this documentation under the terms of the\nCERN OHL v.1.2. (http://ohwr.org/cernohl). This documentation is distributed\nWITHOUT ANY EXPRESS OR IMPLIED WARRANTY, INCLUDING OF\nMERCHANTABILITY, SATISFACTORY QUALITY AND FITNESS FOR A\nPARTICULAR PURPOSE. Please see the CERN OHL v.1.2 for applicable\nconditions
Wire Notes Line
600 550 600 1300
Wire Notes Line
600 1300 3700 1300
Wire Notes Line
3700 1300 3700 550
Wire Notes Line
3700 550 600 550
$Comp
L P3V3 #PWR0202
U 1 1 5751C73E
P 2000 5200
F 0 "#PWR0202" H 2000 5050 50 0001 C CNN
F 1 "P3V3" H 2000 5400 100 0000 C CNN
F 2 "" H 2000 5200 50 0000 C CNN
F 3 "" H 2000 5200 50 0000 C CNN
1 2000 5200
1 0 0 -1
$EndComp
Text Notes 3650 7550 0 60 ~ 0
Optional local oscillator
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1 4100 2850
1 0 0 -1
$EndComp
Wire Wire Line
4100 2700 4100 2650
Wire Wire Line
3800 2650 4500 2650
Connection ~ 4100 2650
$Comp
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F 0 "#PWR0203" H 4100 2800 50 0001 C CNN
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F 2 "" H 4100 3050 50 0000 C CNN
F 3 "" H 4100 3050 50 0000 C CNN
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1 0 0 -1
$EndComp
Wire Wire Line
4100 3050 4100 3000
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1 2850 2850
1 0 0 -1
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$Comp
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F 1 "GND" H 2850 2900 50 0000 C CNN
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F 3 "" H 2850 3050 50 0000 C CNN
1 2850 3050
1 0 0 -1
$EndComp
Wire Wire Line
2850 3050 2850 3000
Wire Wire Line
2850 2700 2850 2650
Connection ~ 2850 2650
Text Label 9550 2600 0 60 ~ 0
CLK0
Text Label 9550 3900 0 60 ~ 0
CLK1
Text Notes 7900 6900 0 100 ~ 0
Time Box Project: the ADC Board
$Comp
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1 0 0 -1
$EndComp
$Comp
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1 0 0 -1
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$Comp
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1 6150 2600
1 0 0 -1
$EndComp
$Comp
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F 5 "CER X7R" V 6150 3350 30 0000 L CNN "Type"
F 6 "25V" V 6100 3350 30 0000 L CNN "Voltage"
F 7 "±10%" V 6200 3350 30 0000 L CNN "Tolerance"
1 5850 3550
0 1 1 0
$EndComp
$Comp
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F 7 "±10%" H 6000 3900 30 0000 L CNN "Tolerance"
1 5950 4050
1 0 0 -1
$EndComp
Text Notes 7550 1050 0 60 ~ 0
Default
Text Notes 6450 4800 0 60 ~ 0
Max speed = 300 MHz
$Comp
L C C116
U 1 1 5753BBE9
P 3000 5850
F 0 "C116" H 3000 5950 50 0000 L CNN
F 1 "1u" H 3000 5750 50 0000 L CNN
F 2 "Capacitors_SMD:C_0603" H 3038 5700 50 0001 C CNN
F 3 "http://www.digikey.com/product-search/en?keywords=478-5010-2-ND" H 3000 5850 50 0001 C CNN
F 4 "0603" H 3050 5550 30 0000 L CNN "Package"
F 5 "CER X7R" H 3050 5650 30 0000 L CNN "Type"
F 6 "16V" H 3050 5600 30 0000 L CNN "Voltage"
F 7 "±10%" H 3050 5700 30 0000 L CNN "Tolerance"
1 3000 5850
1 0 0 -1