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Multi-channel Time Interval Counter and fine delay generator
Commit 68098f3b authored by Nicolas Boucquey's avatar Nicolas Boucquey
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Changed the schematic. Remove the GNDA. Started a new layout from the beginning

parent e97fe83a
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Showing with 23345 additions and 35668 deletions
adcBoard/.pretty/BarrelJack.kicad_mod 0 → 100644
View file @ 68098f3b
(module BarrelJack (layer F.Cu) (tedit 56E98368)
(fp_text reference REF** (at -0.04 4.05) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value BarrelJack (at 0.02 -3.97) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -8.1 4) (end -8.1 0) (layer F.SilkS) (width 0.15))
(fp_line (start -6.1 4) (end -8.1 4) (layer F.SilkS) (width 0.15))
(fp_line (start -6.1 5) (end -6.1 4) (layer F.SilkS) (width 0.15))
(fp_line (start -4.1 5) (end -6.1 5) (layer F.SilkS) (width 0.15))
(fp_line (start -4.1 4) (end -4.1 5) (layer F.SilkS) (width 0.15))
(fp_line (start 6.4 4) (end -4.1 4) (layer F.SilkS) (width 0.15))
(fp_line (start 6.4 -4) (end 6.4 4) (layer F.SilkS) (width 0.15))
(fp_line (start -4.1 -4) (end 6.4 -4) (layer F.SilkS) (width 0.15))
(fp_line (start -4.1 -5) (end -4.1 -4) (layer F.SilkS) (width 0.15))
(fp_line (start -6.1 -5) (end -4.1 -5) (layer F.SilkS) (width 0.15))
(fp_line (start -6.1 -4) (end -6.1 -5) (layer F.SilkS) (width 0.15))
(fp_line (start -8.1 -4) (end -6.1 -4) (layer F.SilkS) (width 0.15))
(fp_line (start -8.1 0) (end -8.1 -4) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole circle (at -3 -2.5) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask F.SilkS))
(pad 2 thru_hole circle (at -3 2.5) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask F.SilkS))
)
adcBoard/ADC-Rev4.bak 0 → 100644
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adcBoard/ADC-Rev4.sch 0 → 100644
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adcBoard/ADC1-Rev4.bak
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......@@ -171,17 +171,6 @@ F 3 "" H 4450 2050 50 0000 C CNN
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P 3850 2450
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F 1 "GNDA" H 3850 2300 50 0000 C CNN
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1 0 0 -1
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F 1 "GNDA" H 3000 3800 50 0000 C CNN
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1 0 0 -1
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Text GLabel 10850 3100 2 60 Input ~ 0
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F 3 "" H 6450 3000 50 0000 C CNN
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-1 0 0 -1
$EndComp
$Comp
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P 7200 6200
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L C C77
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U 1 1 56CEDF2E
P 8900 6200
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F 1 "GNDA" H 8900 6050 50 0000 C CNN
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1 0 0 -1
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Text GLabel 8250 4450 0 60 Input ~ 0
A1P8V
Text Label 7600 4450 0 39 ~ 0
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1 0 0 -1
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$Comp
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P 3000 7250
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F 1 "GNDA" H 3000 7100 50 0000 C CNN
F 2 "" H 3000 7250 50 0000 C CNN
F 3 "" H 3000 7250 50 0000 C CNN
1 3000 7250
1 0 0 -1
$EndComp
Text GLabel 2700 6700 0 60 Input ~ 0
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$Comp
......@@ -1746,14 +1570,190 @@ InB+
Text Label 4000 3650 0 60 ~ 0
InB-
$Comp
L GNDA #PWR0142
U 1 1 56E69166
L GND #PWR?
U 1 1 56E943CE
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F 0 "#PWR?" H 1700 3700 50 0001 C CNN
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F 2 "" H 1700 3950 50 0000 C CNN
F 3 "" H 1700 3950 50 0000 C CNN
1 1700 3950
1 0 0 -1
$EndComp
$Comp
L GND #PWR?
U 1 1 56E944D4
P 2500 3950
F 0 "#PWR?" H 2500 3700 50 0001 C CNN
F 1 "GND" H 2500 3800 50 0000 C CNN
F 2 "" H 2500 3950 50 0000 C CNN
F 3 "" H 2500 3950 50 0000 C CNN
1 2500 3950
1 0 0 -1
$EndComp
$Comp
L GND #PWR?
U 1 1 56E94695
P 3000 3950
F 0 "#PWR?" H 3000 3700 50 0001 C CNN
F 1 "GND" H 3000 3800 50 0000 C CNN
F 2 "" H 3000 3950 50 0000 C CNN
F 3 "" H 3000 3950 50 0000 C CNN
1 3000 3950
1 0 0 -1
$EndComp
$Comp
L GND #PWR?
U 1 1 56E94757
P 3850 4450
F 0 "#PWR?" H 3850 4200 50 0001 C CNN
F 1 "GND" H 3850 4300 50 0000 C CNN
F 2 "" H 3850 4450 50 0000 C CNN
F 3 "" H 3850 4450 50 0000 C CNN
1 3850 4450
1 0 0 -1
$EndComp
$Comp
L GND #PWR?
U 1 1 56E94819
P 4850 4450
F 0 "#PWR?" H 4850 4200 50 0001 C CNN
F 1 "GND" H 4850 4300 50 0000 C CNN
F 2 "" H 4850 4450 50 0000 C CNN
F 3 "" H 4850 4450 50 0000 C CNN
1 4850 4450
1 0 0 -1
$EndComp
$Comp
L GND #PWR?
U 1 1 56E948DB
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F 0 "#PWR?" H 3000 7000 50 0001 C CNN
F 1 "GND" H 3000 7100 50 0000 C CNN
F 2 "" H 3000 7250 50 0000 C CNN
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1 3000 7250
1 0 0 -1
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$Comp
L GND #PWR?
U 1 1 56E9499D
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F 0 "#PWR?" H 1700 1600 50 0001 C CNN
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F 3 "" H 1700 1850 50 0000 C CNN
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1 0 0 -1
$EndComp
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L GND #PWR?
U 1 1 56E94A5F
P 2500 1850
F 0 "#PWR?" H 2500 1600 50 0001 C CNN
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1 2500 1850
1 0 0 -1
$EndComp
$Comp
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U 1 1 56E94B21
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F 3 "" H 3000 1850 50 0000 C CNN
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1 0 0 -1
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U 1 1 56E94BE3
P 3850 2450
F 0 "#PWR?" H 3850 2200 50 0001 C CNN
F 1 "GND" H 3850 2300 50 0000 C CNN
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1 0 0 -1
$EndComp
$Comp
L GND #PWR?
U 1 1 56E94CA5
P 4850 2450
F 0 "#PWR?" H 4850 2200 50 0001 C CNN
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1 0 0 -1
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$Comp
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U 1 1 56E94DA4
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L GND #PWR?
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$Comp
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U 1 1 56E950AC
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$Comp
L GND #PWR?
U 1 1 56E956EF
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F 0 "#PWR?" H 6900 2500 50 0001 C CNN
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$EndSCHEMATC
adcBoard/ADC1-Rev4.sch
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adcBoard/ADC2-Rev4.bak
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......@@ -48,8 +48,6 @@ Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Text GLabel 6550 4450 0 60 Input ~ 0
A1P8V
Text GLabel 8900 1500 2 60 Input ~ 0
JX1_LVDS_6_P
Text GLabel 8900 1600 2 60 Input ~ 0
......@@ -414,8 +412,6 @@ F 3 "" H 1700 3950 50 0000 C CNN
1 1700 3950
1 0 0 -1
$EndComp
Text GLabel 10850 3100 2 60 Input ~ 0
D1P8V
$Comp
L GNDA #PWR0153
U 1 1 56C32BCB
......@@ -580,8 +576,6 @@ Text Label 6950 2250 0 60 ~ 0
CLK_P
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CLK_N
Text GLabel 2700 6000 0 60 Input ~ 0
CLK_2_P
Text Notes 1000 5600 0 60 ~ 0
Transformer-Coupled Differential Clock (Up to 200 MHz)
Text Notes 1250 900 0 39 ~ 0
......@@ -809,8 +803,6 @@ F 3 "" H 8900 6200 50 0000 C CNN
1 8900 6200
1 0 0 -1
$EndComp
Text GLabel 8250 4450 0 60 Input ~ 0
A1P8V
Text Label 7600 4450 0 39 ~ 0
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Text Label 7600 5100 0 39 ~ 0
......@@ -953,7 +945,7 @@ $Comp
L C C127
U 1 1 56D5DA94
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F 0 "C127" H 10800 3300 50 0000 L CNN
F 1 "1u" H 10725 3150 50 0000 L CNN
F 2 "Capacitors_SMD:C_0603" H 10738 3100 50 0001 C CNN
F 3 "" H 10700 3250 50 0000 C CNN
......@@ -1199,8 +1191,6 @@ F 3 "" H 3000 7250 50 0000 C CNN
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1 0 0 -1
$EndComp
Text GLabel 2700 6700 0 60 Input ~ 0
CLK_2_N
$Comp
L R R19
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Text HLabel 2700 6700 0 60 Input ~ 0
CLK_2_N
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Text HLabel 10850 3100 2 60 Input ~ 0
D1P8V
$EndSCHEMATC
adcBoard/ADC2-Rev4.sch
View file @ 68098f3b
......@@ -48,8 +48,6 @@ Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Text GLabel 6550 4450 0 60 Input ~ 0
A1P8V
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1 1700 3950
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$EndComp
Text GLabel 10850 3100 2 60 Input ~ 0
D1P8V
$Comp
L GNDA #PWR0153
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......@@ -580,8 +576,6 @@ Text Label 6950 2250 0 60 ~ 0
CLK_P
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CLK_N
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CLK_2_P
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......@@ -953,7 +945,7 @@ $Comp
L C C127
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......@@ -1199,8 +1191,6 @@ F 3 "" H 3000 7250 50 0000 C CNN
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Text GLabel 2700 6700 0 60 Input ~ 0
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$Comp
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......@@ -1756,4 +1746,14 @@ Text Label 4000 3250 0 60 ~ 0
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CLK_2_P
Text HLabel 2700 6700 0 60 Input ~ 0
CLK_2_N
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A1P8V
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D1P8V
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adcBoard/ADC_CLK_splitter.bak
View file @ 68098f3b
......@@ -38,10 +38,10 @@ EELAYER 25 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 2 7
Title ""
Date ""
Rev ""
Sheet 2 6
Title "ADC Clock Splitter"
Date "2016-03-16"
Rev "1"
Comp ""
Comment1 ""
Comment2 ""
......@@ -85,18 +85,16 @@ Wire Wire Line
Wire Wire Line
5750 4500 5750 4700
$Comp
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Text GLabel 2250 2950 0 79 Input ~ 0
3P3V
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......@@ -127,10 +125,10 @@ Connection ~ 4350 3900
Wire Wire Line
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$Comp
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......@@ -142,10 +140,10 @@ Wire Wire Line
Wire Wire Line
5300 4550 5300 4700
$Comp
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......@@ -173,14 +171,6 @@ Wire Wire Line
7150 3500 7450 3500
Wire Wire Line
7150 3650 7450 3650
Text GLabel 7450 3950 2 60 Input ~ 0
CLK_1_P
Text GLabel 7450 4100 2 60 Input ~ 0
CLK_1_N
Text GLabel 7450 3650 2 60 Input ~ 0
CLK_2_N
Text GLabel 7450 3500 2 60 Input ~ 0
CLK_2_P
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......@@ -195,10 +185,10 @@ Wire Wire Line
7150 4500 7300 4500
Connection ~ 7300 4500
$Comp
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L GNDA #PWR8
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P 7300 4700
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F 1 "GNDA" H 7300 4550 50 0000 C CNN
F 2 "" H 7300 4700 50 0000 C CNN
F 3 "" H 7300 4700 50 0000 C CNN
......@@ -246,7 +236,7 @@ U 1 1 56DAB453
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F 2 "Connect:PINHEAD1-3" H 3200 3200 50 0001 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_1x03" H 3200 3200 50 0001 C CNN
F 3 "" H 3200 3200 50 0000 C CNN
1 3200 3200
0 -1 -1 0
......@@ -259,7 +249,7 @@ U 1 1 56DABB68
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F 3 "" H 2650 3200 50 0000 C CNN
1 2650 3200
0 -1 -1 0
......@@ -283,10 +273,10 @@ Wire Wire Line
Connection ~ 2650 2950
Connection ~ 3200 2950
$Comp
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L GNDA #PWR1
U 1 1 56DAC622
P 2650 3450
F 0 "#PWR05" H 2650 3200 50 0001 C CNN
F 0 "#PWR1" H 2650 3200 50 0001 C CNN
F 1 "GNDA" H 2650 3300 50 0000 C CNN
F 2 "" H 2650 3450 50 0000 C CNN
F 3 "" H 2650 3450 50 0000 C CNN
......@@ -294,10 +284,10 @@ F 3 "" H 2650 3450 50 0000 C CNN
1 0 0 -1
$EndComp
$Comp
L GNDA #PWR06
L GNDA #PWR2
U 1 1 56DAC65C
P 3200 3450
F 0 "#PWR06" H 3200 3200 50 0001 C CNN
F 0 "#PWR2" H 3200 3200 50 0001 C CNN
F 1 "GNDA" H 3200 3300 50 0000 C CNN
F 2 "" H 3200 3450 50 0000 C CNN
F 3 "" H 3200 3450 50 0000 C CNN
......@@ -361,10 +351,10 @@ Wire Wire Line
4650 2900 4650 3050
Connection ~ 4950 2900
$Comp
L GNDA #PWR07
L GNDA #PWR5
U 1 1 56DB1FA4
P 4650 3050
F 0 "#PWR07" H 4650 2800 50 0001 C CNN
F 0 "#PWR5" H 4650 2800 50 0001 C CNN
F 1 "GNDA" H 4650 2900 50 0000 C CNN
F 2 "" H 4650 3050 50 0000 C CNN
F 3 "" H 4650 3050 50 0000 C CNN
......@@ -380,14 +370,24 @@ Maybe put a transformer to serparate the grounds\n
Text Notes 5200 5000 0 60 ~ 0
It should be GND if we separe the two grounds\n
$Comp
L GNDA #PWR08
L GNDA #PWR3
U 1 1 56DEB998
P 3700 4250
F 0 "#PWR08" H 3700 4000 50 0001 C CNN
F 0 "#PWR3" H 3700 4000 50 0001 C CNN
F 1 "GNDA" H 3700 4100 50 0000 C CNN
F 2 "" H 3700 4250 50 0000 C CNN
F 3 "" H 3700 4250 50 0000 C CNN
1 3700 4250
1 0 0 -1
$EndComp
Text HLabel 7450 3950 2 60 Output ~ 0
CLK_1_P
Text HLabel 7450 4100 2 60 Output ~ 0
CLK_1_N
Text HLabel 7450 3500 2 60 Output ~ 0
CLK_2_P
Text HLabel 7450 3650 2 60 Output ~ 0
CLK_2_N
Text HLabel 2250 2950 0 79 Input ~ 0
3P3V
$EndSCHEMATC
adcBoard/ADC_CLK_splitter.sch
View file @ 68098f3b
......@@ -38,10 +38,10 @@ EELAYER 25 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 2 7
Title ""
Date ""
Rev ""
Sheet 2 6
Title "ADC Clock Splitter"
Date "2016-03-16"
Rev "1"