Production Test Suite issueshttps://ohwr.org/project/pts/issues2019-02-12T10:07:01Zhttps://ohwr.org/project/pts/issues/12Create separate wiki pages for each test suite2019-02-12T10:07:01ZErik van der BijCreate separate wiki pages for each test suiteAll test programs for different cards and also the fmceeprom utility are
all together in the repository. As the repository is not easily
readable, a separate wiki page for each project should be created that
we can point to from the product pages.
- Check if current structure is OK
- now: all test suites for independent cards together
- possibly better if test suite is together with a card (also
better for external projects?)
- Create wiki page for each project and make links to it from the main
PTS wiki pagehttps://ohwr.org/project/pts/issues/10SVEC PTS v1: test00 in log2019-02-12T10:07:00ZEvangelia GousiouSVEC PTS v1: test00 in logadd information about test00 results in the .inf and .log files
(so far it was assumed that if there is a log file test00 has passed the
test)https://ohwr.org/project/pts/issues/9SVEC PTS v1: change .inf extension2019-02-12T10:07:00ZEvangelia GousiouSVEC PTS v1: change .inf extension.inf files are quarantined by cern mailing ruleshttps://ohwr.org/project/pts/issues/6SPEC PTS: VHDL cleanup2019-02-12T10:06:58ZEvangelia GousiouSPEC PTS: VHDL cleanupSPEC VHDL files are not in good structure; there should be files missing
and others with mistakes.
Some feedback from a company follows:
"..We have developed the SPEXI based on the SPEC design. To also adjust
the PTS environment from the SPEC to the SPEXI we need the complete VHDL
designs for the SPEC tests to resynthesize these projects.
Erik pointed us to the VHDL zip file on the GIT a few weeks ago. This
zip file is however not complete. And At least one project also contains
an error.
The first project which I opened was ‘test\_ddr’ (test07) of which I
found all source files but this resulted in the following error during
map:
ERROR:PhysDesignRules:2449 - The computed value for the VCO operating
frequency
of PLL\_ADV instance cmp\_gn4124\_core/cmp\_clk\_in/rx\_pll\_adv\_inst
is calculated
to be 320.000000 MHz. This falls below the operating range of the PLL
VCO
frequency for this device of 400.000000 - 1080.000000 MHz. Please
adjust
either the input frequency CLKINx\_PERIOD, multiplication factor
CLKFBOUT\_MULT
or the division factor DIVCLK\_DIVIDE, in order to achieve a VCO
frequency
within the rated operating range for this device.
ERROR:Pack:1642 - Errors in physical DRC.
We currently use the Xilinx ISE WebPack 14.2, but the projects are
created using version 12.2. I do not have this version currently
installed, and I also do not know if this error is caused by the change
in version. I still need to investigate this.
But I have more problems regarding the set of VHDL source files. I have
opened several other projects within this zip file which point to not
existing source files. Fortunately many can be found in other
sub-directories of other project like ‘test\_temp\_sensor’, but not all.
For example project ‘test\_dac\_pll’ is missing the file
wb\_spi\_master.vhd. And the project ‘test\_sata\_dp0’ needs many
ip-cores which I can’t seem to find anywhere.
Is it possible to collect and create a complete set of error free Xilinx
projects which can be synthesized and used for the tests with the SPEC
PTS?"https://ohwr.org/project/pts/issues/5SPEC PTS test: missing files2019-02-12T10:06:58ZErik van der BijSPEC PTS test: missing filesHandle report from Seven Solutions about improvements to make to the
SPEC PTS.
References:
From: Javier Díaz
Sent: 02 March 2014 11:39
To: Erik Van Der Bij
Subject: Re: SPEC PTS test: missing fileshttps://ohwr.org/project/pts/issues/4Status SPEC/SPEXI PTS - improvements2019-02-12T10:06:58ZErik van der BijStatus SPEC/SPEXI PTS - improvementsHandle report from Seven Solutions about improvements to make to the
SPEC/SPEXI PTS.
References:
From: Javier Díaz \[mailto:javier@sevensols.com\]
Sent: 02 March 2014 11:21
To: Rene Bakker; Richard
Cc: Evangelia Gousiou; Erik Van Der Bij; Bart Sijbrandij
Subject: Re: FW: Status SPEC/SPEXI PTShttps://ohwr.org/project/pts/issues/3PTS test should write valid FRU if tests are OK2019-02-12T10:06:57ZBenoit RatPTS test should write valid FRU if tests are OKIn the new version of fmc-bus we check the board type in the FRU FMC
EEPROM in order to load proper gateware/drivers.
The PTS should write valid FRU at the end of the test of an FMC board if
this one was okay.https://ohwr.org/project/pts/issues/2DIO PTS: fix string format function2019-02-12T10:06:57ZTomasz WlostowskiDIO PTS: fix string format functionReported by Piotr Miedzik (GSI):
"I modified sources of PTS project to test boards (FMC DIO 5ch TTL a)
using Scientific Linux release 6.3 (Carbon) and Python 2.6.6.
The main problem was with string format function which was not accepting
parameters without indexes."
### Files
* [0001-fmcdio5chttla-fixed-sting-format-function-for-python.patch](/uploads/45a867aad5ec484f962bce0046a324ab/0001-fmcdio5chttla-fixed-sting-format-function-for-python.patch)https://ohwr.org/project/pts/issues/1[SVEC] Changes to men-on/off/reset scripts2019-02-12T10:06:57ZTheodor-Adrian Stana[SVEC] Changes to men-on/off/reset scriptsIn newer versions of the ELMA SysMon firmware, the OID for powering on
and off the crate has changed. In the current SVEC PTS version, the
command for turning on power to the crate is (from the `men-on` script):
*OLD**
snmpset -v2c -c ADMIN elma 1.3.6.1.4.1.37968.1.1.7.2.1.3.0 i 0
This command is, in newer SysMon firmware versions (note the changed OID
-- the argument full of dots to the `snmpset` command):
*NEW**
snmpset -v2c -c ADMIN elma 1.3.6.1.4.1.37968.1.1.7.2.1.3.1 i 0
Simlarly, the command for turning off power to the crate (from
`men-off`):
*OLD**
snmpset -v2c -c ADMIN elma 1.3.6.1.4.1.37968.1.1.7.2.1.3.0 i 1
should be:
*NEW**
snmpset -v2c -c ADMIN elma 1.3.6.1.4.1.37968.1.1.7.2.1.3.1 i 1
This change should be made in the following files:
- `men-on`
- `men-off`
- `men-reset`