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Production Test Suite
Commit 0ec3b588 authored by Grzegorz Daniluk's avatar Grzegorz Daniluk
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svec cleanup: remove python sources, these same files are in the ubuntu/* pts structure

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test/svec/python/ReadMe.txt deleted 100644 → 0
View file @ 29d549ec
This folder includes the python files of the 17 SVEC PTS tests.
Note that the same files are in the svec_pts_structure folder under /svec_pts_structure/pyts
Here is the correspondance between test numbers, python files and ApplicationFPGA binary files:
bus_test.bin -> test01.bin
bus_test.py -> test01.py
svec_pts_fmcsuppl_sfpeeprom.bin -> test02.bin
fmc_supplies.py -> test02.py
svec_pts_fmcconnect.bin -> test03.bin
fmc_connectors.py -> test03.py
svec_pts_fmcsuppl_sfpeeprom.bin -> test04.bin
sfp_eeprom.py -> test04.py
svec_pts_si570_tempid_eeprom.bin -> test05.bin
eeprom.py -> test05.py
svec_pts_si570_tempid_eeprom.bin -> test06.bin
therm_id.py -> test06.py
svec_pts_si570_tempid_eeprom.bin -> test07.bin
si570_osc.py -> test07.py
svec_pts_dac_vcxo_pll.bin -> test08.bin
dac_vxco_pll.py -> test08.py
svec_pts_usb_vmep2.bin -> test09.bin
dummy_usb_uart.py -> test09.py
svec_pts_leds_lemo.bin -> test10.bin
lemo.py -> test10.py
svec_pts_usb_vmep2.bin -> test11.bin
vmep2.py -> test11.py
svec_pts_sfp_sata_hsfmc.bin -> test12.bin
gtp_test.py -> test12.py
svec_afpga_gtp_clkfmc_top.bin -> test13.bin
gtp_clkfmc_test.py -> test13.py
svec_afpga_ddr_test.bin -> test14.bin
ddr_test.py -> test14.py
svec_pts_pcbvers_pushbutt.bin -> test15.bin
push_button.py -> test15.py
svec_pts_leds_lemo.bin -> test16.bin
leds.py -> test16.py
svec_pts_pcbvers_pushbutt.bin -> test17.bin
pcb_version.py -> test17.py
Note: test00 is implemented in the pts.py and loads the SystemFPGA with the svec_bootloader.bit
test/svec/python/SVEC_FMC_pinout.txt deleted 100644 → 0
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FMC1 0 d21
FMC1 1 h23
FMC1 2 h22
FMC1 3 g21
FMC1 4 g22
FMC1 5 c19
FMC1 6 c18
FMC1 7 d20
FMC1 8 d18
FMC1 9 d17
FMC1 10 h19
FMC1 11 h20
FMC1 12 g18
FMC1 13 h38
FMC1 14 g36
FMC1 15 g37
FMC1 16 h13
FMC1 17 d11
FMC1 18 h14
FMC1 19 g13
FMC1 20 g12
FMC1 21 c11
FMC1 22 g15
FMC1 23 d15
FMC1 24 g19
FMC1 25 g16
FMC1 26 h16
FMC1 27 c15
FMC1 28 h17
FMC1 29 c14
FMC1 30 d14
FMC1 31 d12
FMC1 32 c26
FMC1 33 d24
FMC1 34 g24
FMC1 35 g25
FMC1 36 c23
FMC1 37 c22
FMC1 38 d23
FMC1 39 h25
FMC1 40 h28
FMC1 41 g28
FMC1 42 d29
FMC1 43 g27
FMC1 44 c27
FMC1 45 d26
FMC1 46 h26
FMC1 47 d27
FMC1 48 h37
FMC1 49 h35
FMC1 50 d35
FMC1 51 g34
FMC1 52 h34
FMC1 53 c34
FMC1 54 d34
FMC1 55 d33
FMC1 56 g30
FMC1 57 g31
FMC1 58 d31
FMC1 59 g33
FMC1 60 h32
FMC1 61 h31
FMC1 62 d30
FMC1 63 h29
FMC1 64 h2
FMC1 65 h4
FMC1 66 h5
FMC1 81 d1
FMC1 82 d8
FMC1 83 c10
FMC1 84 d9
FMC1 85 g10
FMC1 86 h10
FMC1 87 g9
FMC1 88 h1
FMC1 89 g3
FMC1 90 g2
FMC1 91 g6
FMC1 93 g6
FMC1 95 h11
FMC2 0 d21
FMC2 1 h23
FMC2 2 h22
FMC2 3 g21
FMC2 4 g22
FMC2 5 c19
FMC2 6 c18
FMC2 7 d20
FMC2 8 d18
FMC2 9 d17
FMC2 10 h19
FMC2 11 h20
FMC2 12 g18
FMC2 13 h38
FMC2 14 g36
FMC2 15 g37
FMC2 16 h13
FMC2 17 d11
FMC2 18 h14
FMC2 19 g13
FMC2 20 g12
FMC2 21 c11
FMC2 22 g15
FMC2 23 d15
FMC2 24 g19
FMC2 25 g16
FMC2 26 h16
FMC2 27 c15
FMC2 28 h17
FMC2 29 c14
FMC2 30 d14
FMC2 31 d12
FMC2 32 c26
FMC2 33 d24
FMC2 34 g24
FMC2 35 g25
FMC2 36 c23
FMC2 37 c22
FMC2 38 d23
FMC2 39 h25
FMC2 40 h28
FMC2 41 g28
FMC2 42 d29
FMC2 43 g27
FMC2 44 c27
FMC2 45 d26
FMC2 46 h26
FMC2 47 d27
FMC2 48 h37
FMC2 49 h35
FMC2 50 d35
FMC2 51 g34
FMC2 52 h34
FMC2 53 c34
FMC2 54 d34
FMC2 55 d33
FMC2 56 g30
FMC2 57 g31
FMC2 58 d31
FMC2 59 g33
FMC2 60 h32
FMC2 61 h31
FMC2 62 d30
FMC2 63 h29
FMC2 64 h2
FMC2 65 h4
FMC2 66 h5
FMC2 81 d1
FMC2 82 d8
FMC2 83 c10
FMC2 84 d9
FMC2 85 g10
FMC2 86 h10
FMC2 87 g9
FMC2 88 h1
FMC2 89 g3
FMC2 90 g2
FMC2 91 g6
FMC2 93 g6
FMC2 95 h11
test/svec/python/SVEC_VMEP2_pinout.txt deleted 100644 → 0
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00: P2B.a2 and/or P2E.d2
01: P2B.a3 and/or P2E.d3
02: P2B.a5 and/or P2E.d5
03: P2B.a6 and/or P2E.d6
04: P2B.a8 and/or P2E.d8
05: P2B.a9 and/or P2E.d9
06: P2B.a11 and/or P2E.d11
07: P2B.a12 and/or P2E.d12
08: P2B.a14 and/or P2E.d14
09: P2B.a15 and/or P2E.d15
10: P2B.a17 and/or P2E.d17
11: P2B.a18 and/or P2E.d18
12: P2B.a20 and/or P2E.d20
13: P2B.a21 and/or P2E.d21
14: P2B.a23 and/or P2E.d23
15: P2B.a24 and/or P2E.d24
16: P2E.a26 and/or P2E.d29
17: P2E.a27 and/or P2E.d31
test/svec/python/bus_test.py deleted 100644 → 0
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# Copyright CERN, 2012
# Author: Julian Lewis <julian.lewis@cern.ch>
# Licence: GPL v2 or later.
# Website: http://www.ohwr.org
# Import system modules
import sys
import time
from ctypes import *
import os, errno, re, sys, struct
import os.path
import ptsexcept
from vv_pts import *
# Copyright CERN, July 2012
# Author: Julian Lewis (CERN)
# Licence: GPL v2 or later.
# Website: http://www.ohwr.org
# Website: http://www.sevensols.com
# Last modifications:
def ram_test(bus, val):
RAM = range(0x400,0x800,4)
for i in RAM:
bus.vv_write(i,i)
for i in RAM:
rbk = bus.vv_read(i)
if i != rbk:
raise BusException("memory_check: wrote: 0x%X read back: 0x%X address: 0x%X" % (i, rbk, i))
break
for i in RAM:
bus.vv_write(i,val)
for i in RAM:
rbk = bus.vv_read(i)
if val != rbk:
raise BusException("memory_check: wrote: 0x%X read back: 0x%X address: 0x%X" % (val, rbk, i))
break
def main(bus,tname,log,elg):
"""
tests the: VME bus address/ data/ interrupt lines
uses the: bus_test.py and bus_test.bin
"""
INT_CNT = 0x00000010
INT_DIS_MSK = 0x00000000
INT_ENB_MSK = 0x00000004
INT_MSK = 0x0000000c
INT_SRC = 0x00000008
RAM = 0x00000400
pel = PTS_ERROR_LOGGER(log,elg)
try:
ram_test(bus,0x55555555)
log.write("Ram test 0x55555555 OK\n")
ram_test(bus,0xAAAAAAAA)
log.write("Ram test 0xAAAAAAAA OK\n")
ram_test(bus,0xFFFFFFFF)
log.write("Ram test 0xFFFFFFFF OK\n")
ram_test(bus,0x00000000)
log.write("Ram test 0x00000000 OK\n")
bus.vv_write(INT_ENB_MSK,0x3)
irq_src = bus.vv_irqwait()
old_irq_cnt = bus.vv_read(INT_CNT)
for i in range(0,32):
irq_src = bus.vv_irqwait()
irq_cnt = bus.vv_read(INT_CNT)
if irq_src == 0:
raise BusException("vv_irqwait: timeout")
break
if old_irq_cnt + 1 != irq_cnt:
raise BusException("vv_irqwait: old count: %d new count: %d" % (old_irq_cnt, irq_cnt))
log.write("bustest: Interrupt: %d OK\n" % (old_irq_cnt))
old_irq_cnt = irq_cnt
return pel.get()
except BusException, e:
raise PtsError("ERROR: VME Exception: %s" % (e))
except BusWarning, e:
raise PtsError("ERROR: VME Warning: %s" % (e))
#finally:
# return pel.get()
test/svec/python/dac_vxco_pll.py deleted 100644 → 0
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test/svec/python/ddr_test.py deleted 100644 → 0
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test/svec/python/dummy_usb_uart.py deleted 100644 → 0
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##_________________________________________________________________________________________________
## |
## |SVEC PTS| |
## |
## CERN,BE/CO-HT |
##________________________________________________________________________________________________|
##-------------------------------------------------------------------------------------------------
## |
## SVEC USB2UART test |
## |
##-------------------------------------------------------------------------------------------------
## |
## Description Testing of the "USB to UART" chip IC17. For this test a USB cable needs to be |
## plugged between a USB port of the PC and the USB connector of the SVEC under test.|
## |
## This python test is used in companion with the usb_uart.py. |
## It reads the alphabet that has been written to the USB by the write_to_usb.py. |
## Note that the firmware loaded to the Application FPGA implements the loop between |
## the transmitter and the receiver of the USB to UART chip. |
## ________ __________ _____________ |
## | | | txd | | |
## | USB | |---------->|--. | |
## PC |<---------->| USB2UART | rxd | | AFPGA | |
## | | |<----------|--. | |
## ________| |__________| |_____________| |
## |
## Note also that in this test there is no implication of the VME interface. |
## |
## FW to load svec_pts_usb_vmep2.bin |
## Authors Julian Lewis (Julian.Lewis@cern.ch) |
## Website http://www.ohwr.org/projects/pts |
## Date 24/07/2012 |
##-------------------------------------------------------------------------------------------------
##-------------------------------------------------------------------------------------------------
## GNU LESSER GENERAL PUBLIC LICENSE |
## ------------------------------------ |
## This source file is free software; you can redistribute it and/or modify it under the terms of |
## the GNU Lesser General Public License as published by the Free Software Foundation; either |
## version 2.1 of the License, or (at your option) any later version. |
## This source is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; |
## without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
## See the GNU Lesser General Public License for more details. |
## You should have received a copy of the GNU Lesser General Public License along with this |
## source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html |
##-------------------------------------------------------------------------------------------------
##-------------------------------------------------------------------------------------------------
## Import --
##-------------------------------------------------------------------------------------------------
import sys
import time
import os
from ptsexcept import *
##-------------------------------------------------------------------------------------------------
## main --
##-------------------------------------------------------------------------------------------------
def main(bus,tname,log,elg):
"""
tests the: USB-UART IC17
uses the: dummy_usb_uart.py , usb_uart.py and svec_pts_usb_vmep2.bin
"""
pel = PTS_ERROR_LOGGER(log,elg)
try:
fn = "/home/pts/ubuntu/pts/log/usb_test_result.txt"
res = open(fn,"r");
txt = tuple(res)
res.close()
except:
msg = "ERROR: Can't read %s\n" % (fn)
log.write("%s\n" % (msg))
raise PtsError(msg)
for i in range(0,len(txt)):
log.write(txt[i])
print txt[i]
if txt[i].find("ERROR:") != -1:
pel.set(txt[i])
return pel.get()
test/svec/python/eeprom.py deleted 100644 → 0
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##_________________________________________________________________________________________________
## |
## |SVEC PTS| |
## |
## CERN,BE/CO-HT |
##________________________________________________________________________________________________|
##-------------------------------------------------------------------------------------------------
## |
## SVEC EEPROM test |
## |
##-------------------------------------------------------------------------------------------------
## |
## Description Testing of the "EEPROM 24LC64" chip on the SVEC board (IC31). The firmware loaded |
## to the application FPGA implements the interface for the communication between the|
## VME bus and the I2C of the EEPROM; this interface is an I2C WISHBONE master, |
## running with a system clock of 50MHz. |
## |
## The VME driver needs to map x1000 bytes of memory. |
## The I2C WISHBONE master can be accessed at VME base address x300. |
## The I2C address of the EEPROM is x51, predefined in the part number. |
## |
## The test attempts several writings and readbacks on different EEPROM locations. |
## |
## FW to load svec_pts_si570_tempid_eeprom.bin |
## Authors Julian Lewis (Julian.Lewis@cern.ch) |
## Website http://www.ohwr.org/projects/pts |
## Date 24/07/2012 |
##-------------------------------------------------------------------------------------------------
##-------------------------------------------------------------------------------------------------
## GNU LESSER GENERAL PUBLIC LICENSE |
## ------------------------------------ |
## This source file is free software; you can redistribute it and/or modify it under the terms of |
## the GNU Lesser General Public License as published by the Free Software Foundation; either |
## version 2.1 of the License, or (at your option) any later version. |
## This source is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; |
## without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
## See the GNU Lesser General Public License for more details. |
## You should have received a copy of the GNU Lesser General Public License along with this |
## source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html |
##-------------------------------------------------------------------------------------------------
##-------------------------------------------------------------------------------------------------
## Import --
##-------------------------------------------------------------------------------------------------
# Import system modules
import sys
import time
import os
# Import common modules
from ctypes import *
from ptsexcept import *
from vv_pts import *
##-------------------------------------------------------------------------------------------------
## I2C class --
##-------------------------------------------------------------------------------------------------
class COpenCoresI2C:
R_PREL = 0x0
R_PREH = 0x4
R_CTR = 0x8
R_TXR = 0xC
R_RXR = 0xC
R_CR = 0x10
R_SR = 0x10
CTR_EN = (1<<7)
CR_STA = (1<<7)
CR_STO = (1<<6)
CR_WR = (1<<4)
CR_RD = (1<<5)
CR_NACK = (1<<3)
SR_RXACK = (1<<7)
SR_TIP = (1<<1)
def wr_reg(self, addr, val):
self.bus.vv_write(self.base + addr,val)
def rd_reg(self,addr):
return self.bus.vv_read(self.base + addr)
def __init__(self, bus, base, prescaler):
self.bus = bus;
self.base =base;
self.wr_reg(self.R_CTR, 0);
self.wr_reg(self.R_PREL, (prescaler & 0xff))
self.wr_reg(self.R_PREH, (prescaler >> 8))
self.wr_reg(self.R_CTR, self.CTR_EN);
def wait_busy(self):
tmo = 0
while(self.rd_reg(self.R_SR) & self.SR_TIP):
tmo = tmo+1
if tmo > 1000:
msg = "ERROR: EEPROM IC31: Not responding"
raise PtsError(msg)
def start(self, addr, write_mode):
addr = addr << 1
if(write_mode == False):
addr = addr | 1;
self.wr_reg(self.R_TXR, addr);
self.wr_reg(self.R_CR, self.CR_STA | self.CR_WR);
self.wait_busy()
if(self.rd_reg(self.R_SR) & self.SR_RXACK):
pass
def write(self, data, last):
self.wr_reg(self.R_TXR, data);
cmd = self.CR_WR;
if(last):
cmd = cmd | self.CR_STO;
self.wr_reg(self.R_CR, cmd);
self.wait_busy();
if(self.rd_reg(self.R_SR) & self.SR_RXACK):
pass
def read(self, last):
cmd = self.CR_RD;
if(last):
cmd = cmd | self.CR_STO | self.CR_NACK;
self.wr_reg(self.R_CR, cmd);
self.wait_busy();
return self.rd_reg(self.R_RXR);
def scan_bus(self):
for i in range(0,128):
self.wr_reg(self.R_TXR, i<<1);
self.wr_reg(self.R_CR, self.CR_STA | self.CR_WR);
self.wait_busy()
if(not self.rd_reg(self.R_SR) & self.SR_RXACK):
# print("scan_bus:Found device at addr %x" % i)
return i
self.wr_reg(self.R_CR, self.CR_STO);
self.wait_busy()
def scan(self):
periph_addr = []
for i in range(0,128):
self.wr_reg(self.R_TXR, i<<1)
self.wr_reg(self.R_CR, self.CR_STA | self.CR_WR)
self.wait_busy()
if(not self.rd_reg(self.R_SR) & self.SR_RXACK):
# print("scan:Device found at address: 0x%.2X") % i
periph_addr.append(i)
self.wr_reg(self.R_CR, self.CR_STO);
self.wait_busy()
return periph_addr
##-------------------------------------------------------------------------------------------------
## EEPROM class --
##-------------------------------------------------------------------------------------------------
class C24LC64:
def __init__(self, i2c, i2c_addr):
self.i2c = i2c
self.i2c_addr = i2c_addr
def wr_data(self, mem_addr, data):
if len(data) > 32:
#print "Maximum sequence write size is 32 byte!"
return -1;
self.i2c.start(self.i2c_addr, True)
self.i2c.write((mem_addr >> 8), False)
self.i2c.write((mem_addr & 0xFF), False)
for i in range(len(data)-1):
self.i2c.write(data[i],False)
if len(data) > 1:
i += 1
else:
i = 0
self.i2c.write(data[i],True)
return 0;
def rd_data(self, mem_addr, size):
self.i2c.start(self.i2c_addr, True)
self.i2c.write((mem_addr >> 8), False)
self.i2c.write((mem_addr & 0xFF), False)
self.i2c.start(self.i2c_addr, False)
data = []
for i in range(size-1):
data.append(self.i2c.read(False))
data.append(self.i2c.read(True))
return data;
##-------------------------------------------------------------------------------------------------
## main --
##-------------------------------------------------------------------------------------------------
def main(bus,tname,log,elg):
"""
tests the: EEPROM IC31
uses the: eeprom.py and svec_pts_si570_tempid_eeprom.bin
"""
EEPROM_I2C_WB_ADDR = 0x300
EEPROM_ADDR = 0x51
pel = PTS_ERROR_LOGGER(log,elg)
try:
i2c = COpenCoresI2C(bus, EEPROM_I2C_WB_ADDR, 99) # prescaler value (99), calculated for 50MHz clk
periph_addr = i2c.scan_bus()
if periph_addr != EEPROM_ADDR:
msg = "ERROR: EEPROM IC31: No device at address 0x%X" % (EEPROM_ADDR)
log.write("%s\n" % (msg))
raise PtsError()
eprom = C24LC64(i2c,EEPROM_ADDR)
addr = 0x20
wr_data = [0x55, 0xAA, 0x00, 0xFF]
rd_data = []
log.write("Writting data at EEPROM address 0x%X: [" % (addr))
# writing wr_data to EEPROM address addr
for x in wr_data:
msg = "0x%X " % (x)
log.write(msg)
log.write("]\n")
eprom.wr_data(addr, wr_data)
time.sleep(0.1)
# reading from EEPROM address addr
log.write("Reading data from EEPROM address 0x%X: [" % (addr))
rd_data = eprom.rd_data(addr, len(wr_data))
for x in rd_data:
msg = "0x%X " % (x)
log.write(msg)
log.write("]\n")
if(rd_data != wr_data):
msg = "ERROR: EEPROM IC31: Corrupt data at address 0x%X" % (addr)
pel.set(msg)
else:
log.write("EEPROM IC31: OK\n")
return pel.get()
except BusException, e:
raise PtsError("VME Exception: %s" % (e))
except BusWarning, e:
raise PtsError("VME Warning: %s" % (e))
#finally:
# return pel.get()
test/svec/python/fmc_connectors.py deleted 100644 → 0
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test/svec/python/fmc_supplies.py deleted 100644 → 0
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test/svec/python/gtp_clkfmc_test.py deleted 100644 → 0
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test/svec/python/gtp_test.py deleted 100644 → 0
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test/svec/python/jpts.py deleted 100644 → 0
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#! ./python
# coding: utf8
import sys
import ptsexcept
import time
import traceback
from optparse import OptionParser
from vv_pts import *
from os import path, access, R_OK, readlink
sys.path.append('.')
def lnk_ptr(tname):
lname = "./%s.py" % (tname)
if path.islink(lname):
return readlink(lname)
else:
return tname
def run_test(tname,bus,log,ifo):
try:
mod = __import__(tname)
msg = mod.main.__doc__
print msg
log.write("%s\n" % (msg))
ifo.write("%s\n" % (msg))
time.sleep(1)
return mod.main(bus,tname,ifo,log)
except PtsError, e:
msg = "%s %s->%s\n" % (e, tname, lnk_ptr(tname))
print "ABORT: %s" % (msg)
ifo.write(msg)
log.write(msg)
return 1
if __name__ == '__main__':
use = "Usage: %prog [--lun=0 --snum=1234 5678 --debug] test_num,run_count test_num,run_count..."
parser = OptionParser(usage=use, version="pts version 2.0")
parser.add_option("-l", "--lun", help="Logical Unit Number", type="int", default=0, dest="lun")
parser.add_option("-s", "--snum", help="Serial number(s)", dest="snum", action="store", nargs=2, default=("0","0"))
parser.add_option("-n", "--name", help="Board name", dest="board_name", default="svec")
parser.add_option("-b", "--bus", help="Bus VME/PCI", dest="bus_type", default="VME")
parser.add_option("-o", "--outdir", help="Path to log directory", dest="dir_name", default=".")
parser.add_option("-d", "--debug", help="Debug Option", dest="debug", default=False, action="store_true")
options, args = parser.parse_args()
if options.debug:
print "\n"
print "options (Logical Unit Number) lun :%d" % options.lun
print "options (Serial numbers pair) snum :%s %s" % options.snum
print "options (Board name ) name :%s" % options.board_name
print "options (Bus type VME or PCI) bus :%s" % options.bus_type
print "options (Location of log dir) outdir:%s" % options.dir_name
print "options (Debug printing flag) debug :%d" % options.debug
print "arglist (List: Test,RunCount) :%s" % (args)
tns = []
if len(args):
for a in args:
nstr = a.split(',')
tn = int(nstr[0])
if len(nstr) == 2:
tc = int(nstr[1])
else:
tc = 1
tns.append((tn,tc))
else:
for a in range(19):
tns.append((a,1))
lun = options.lun
sno, xno = options.snum
bnm = options.board_name
dir = options.dir_name
now = time.asctime(time.localtime(time.time()))
now = now.replace(" ","-")
now = now.replace(":","-")
lgf = "%s/log/%s-%s-%s-%s-%1d.log" % (dir,bnm,sno,xno,now,lun)
inf = "%s/log/%s-%s-%s-%s-%1d.inf" % (dir,bnm,sno,xno,now,lun)
try:
log = open(lgf, "w")
ifo = open(inf, "w")
except Exception, e:
msg = "Exception: %s" % (e)
print "Fatal: %s" % (msg)
sys.exit(1)
if options.debug:
print "\n"
print "Log file is: %s" % lgf
print "Inf file is: %s" % inf
print "\n"
try:
if options.bus_type == "VME":
bus = VME(lun)
else:
bus = PCI(lun)
bus.vv_init()
except BusException, e:
print "Fatal:BUS Exception: %s" % (e)
except BusWarning, e:
print "Warning:Bus Exception: %s" % (e)
valid_ids = [0x10, 0x54, 0x58, 0x5A]
for t in tns:
tname = "test%02d" % t[0]
bin = "%s/%s.bin" % (dir, tname)
pyt = "%s/%s.py" % (dir, tname)
if path.exists(pyt) and path.isfile(pyt) and access(pyt, R_OK):
try:
bid = bus.vv_load(bin,1)
if bid in valid_ids:
if options.debug:
print "BitstreamId:0x%02X" % (bid)
else:
msg = "ERROR:Invalid BitstreamId:0x%02X" % (bid)
raise PtsError(msg)
except Exception, e:
print "Retry:%s Load FPGA bitstream" % (tname)
try:
time.sleep(1)
bid = bus.vv_load(bin,1)
if bid in valid_ids:
if options.debug:
print "BitstreamId:0x%02X" % (bid)
else:
msg = "ERROR:Invalid BitstreamId:0x%02X" % (bid)
raise PtsError(msg)
except Exception, e:
msg = "FAIL:Skip:%s Can't load FPGA bitstream:%s" % (tname,e)
print msg
log.write(msg)
ifo.write(msg)
continue
else:
continue;
time.sleep(1)
for n in range(t[1]):
if n == 10:
msg = "Printing suppresses after 10 runs"
print msg
log.write('\n' + msg + '\n')
ifo.write('\n' + msg + '\n')
if n < 10:
msg = "Run:%d Begin:%s" % (n+1,tname)
print msg
log.write('\n' + msg + '\n')
ifo.write('\n' + msg + '\n')
try:
cc = run_test(tname,bus,log,ifo)
if cc == 0:
msg = "PASS: %s" % (tname)
log.write(msg + '\n')
ifo.write(msg + '\n')
print msg
else:
msg = "FAIL: %s->%s" % (tname, lnk_ptr(tname))
log.write(msg + '\n')
ifo.write(msg + '\n')
print msg
except Exception, e:
if options.debug:
print e
traceback.print_exc()
print "Skip:%s Can't run" % (tname)
continue
if n < 10:
msg = "Run:%d End:%s\n" % (n+1,tname)
print msg
log.write(msg + '\n')
ifo.write(msg + '\n')
bus.vv_close()
log.close()
ifo.close()
if options.debug:
print "Debug: printing:%s" % (inf)
ifo = open(inf, "r")
try:
for line in ifo:
l = line.split("\n")
print "%s" % l[0]
finally:
ifo.close()
sys.exit(1)
test/svec/python/leds.py deleted 100644 → 0
View file @ 29d549ec
##_________________________________________________________________________________________________
## |
## |SVEC PTS| |
## |
## CERN,BE/CO-HT |
##________________________________________________________________________________________________|
##-------------------------------------------------------------------------------------------------
## |
## SVEC LEDs test |
## |
##-------------------------------------------------------------------------------------------------
## |
## Description Testing of the Front Panel LEDs (IC29 and bi-color LEDS) of the SVEC board. |
## For this test, the operator's intervention is needed; when prompted the operator |
## needs to visually check the LEDS. |
## |
## The VME interface is not implicated in this test. |
## |
## FW to load svec_pts_leds_lemo.bin |
## Authors Julian Lewis (Julian.Lewis@cern.ch) |
## Website http://www.ohwr.org/projects/pts |
## Date 24/07/2012 |
##-------------------------------------------------------------------------------------------------
##-------------------------------------------------------------------------------------------------
## GNU LESSER GENERAL PUBLIC LICENSE |
## ------------------------------------ |
## This source file is free software; you can redistribute it and/or modify it under the terms of |
## the GNU Lesser General Public License as published by the Free Software Foundation; either |
## version 2.1 of the License, or (at your option) any later version. |
## This source is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; |
## without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
## See the GNU Lesser General Public License for more details. |
## You should have received a copy of the GNU Lesser General Public License along with this |
## source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html |
##-------------------------------------------------------------------------------------------------
##-------------------------------------------------------------------------------------------------
## Import --
##-------------------------------------------------------------------------------------------------
# Import system modules
import sys
import time
import os, errno, re, sys, struct
import os.path
import traceback
# Import common modules
from ctypes import *
from ptsexcept import *
from vv_pts import *
##-------------------------------------------------------------------------------------------------
## main --
##-------------------------------------------------------------------------------------------------
def main(bus,tname,log,elg):
"""
tests the: Front Panel LEDS and transceiver IC29
uses the: leds.py and svec_pts_leds_lemo.bin
"""
BUTTON_DETECT_REG = 0x100
BUTTON_CLEAR_REG = 0x108
pel = PTS_ERROR_LOGGER(log,elg)
try:
inp = raw_input("--> Are the LEDS blinking one by one yes/no: ")
while True:
if inp.find("yes") != -1 or inp.find("YES") != -1:
break
if inp.find("no") != -1 or inp.find("NO") != -1:
msg = "ERROR: Front Panel LEDs or treansceiver IC29"
pel.set(msg)
break
inp = raw_input('Enter "yes" or "no" to continue:')
return pel.get()
except BusException, e:
raise PtsError("VME Exception: %s" % (e))
except BusWarning, e:
raise PtsError("VME Warning: %s" % (e))
test/svec/python/lemo.py deleted 100644 → 0
View file @ 29d549ec
##_________________________________________________________________________________________________
## |
## |SVEC PTS| |
## |
## CERN,BE/CO-HT |
##________________________________________________________________________________________________|
##-------------------------------------------------------------------------------------------------
## |
## SVEC LEMOs test |
## |
##-------------------------------------------------------------------------------------------------
## |
## Description Testing of the Front Panel LEMOs & the SN74VME transceiver(IC16)of the SVEC board.|
## For this test, 2 LEMO cables need to be connected on the SVEC front panel; as the |
## following figure shows L1 needs to be connected to L3 and L2 to L4. |
## ____________ |
## | L1 L2 | |
## /-----|--O O--|-----\ |
## | |____________| | |
## | ____________ | |
## | | L3 L4 | | |
## \-----|--O O--|-----/ |
## |____________| |
## |
## The firmware loaded to the application FPGA implements the interface for the |
## communication between the SN74VME transceiver that controls the LEMOs and the VME |
## bus. In detail these are the available VME registers: |
## 0x00, bit 0: L1 output |
## 0x00, bit 1: L2 output |
## 0x04, bit 0: L1 output enable, active high |
## 0x04, bit 1: L2 output enable, active high |
## 0x08, bit 0: L3 input |
## 0x08, bit 1: L4 input |
## |
## The test plays with the available combinations of "enable" and "output" on L1, L2 |
## and looks for the corresponding values on L3, L4. |
## |
## The VME driver needs to map x1000 bytes of memory. |
## |
## FW to load svec_pts_leds_lemo.bin |
## Authors Julian Lewis (Julian.Lewis@cern.ch) |
## Website http://www.ohwr.org/projects/pts |
## Date 24/07/2012 |
##-------------------------------------------------------------------------------------------------
##-------------------------------------------------------------------------------------------------
## GNU LESSER GENERAL PUBLIC LICENSE |
## ------------------------------------ |
## This source file is free software; you can redistribute it and/or modify it under the terms of |
## the GNU Lesser General Public License as published by the Free Software Foundation; either |
## version 2.1 of the License, or (at your option) any later version. |
## This source is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; |
## without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
## See the GNU Lesser General Public License for more details. |
## You should have received a copy of the GNU Lesser General Public License along with this |
## source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html |
##-------------------------------------------------------------------------------------------------
##-------------------------------------------------------------------------------------------------
## Import --
##-------------------------------------------------------------------------------------------------
# Import system modules
import sys
import time
import os, errno, re, sys, struct
import os.path
import traceback
# Import common modules
from ctypes import *
from ptsexcept import *
from vv_pts import *
##-------------------------------------------------------------------------------------------------
## Lemos --
##-------------------------------------------------------------------------------------------------
def gpio(bus,out,enable):
LEMO_OUTPUT_WB_ADDR = 0x00
LEMO_ENABLE_WB_ADDR = 0x04
LEMO_INPUT_WB_ADDR = 0x08
bus.vv_write(LEMO_OUTPUT_WB_ADDR,out)
bus.vv_write(LEMO_ENABLE_WB_ADDR,enable)
return bus.vv_read(LEMO_INPUT_WB_ADDR)
def check(inp,out,enb):
L1 = ""
if 1 & out:
L1 += "L1:1"
else:
L1 += "L1:0"
L2 = ""
if 2 & out:
L2 += "L2:1"
else:
L2 += "L2:0"
EL1 = ""
if 1 & enb:
EL1 += "EnbL1:1"
else:
EL1 += "EnbL1:0"
EL2 = ""
if 2 & enb:
EL2 += "EnbL2:1"
else:
EL2 += "EnbL2:0"
L3 = ""
if 1 & inp:
L3 += "L3:1"
else:
L3 += "L3:0"
L4 = ""
if 2 & inp:
L4 += "L4:1"
else:
L4 += "L4:0"
if (out & enb) == inp:
msg = "[%s,%s=>%s] [%s,%s=>%s] OK" % (L1,EL1,L3,L2,EL2,L4)
else:
msg = "ERROR: LEMO IC16: [%s,%s=>%s] [%s,%s=>%s]" % (L1,EL1,L3,L2,EL2,L4)
return msg
##-------------------------------------------------------------------------------------------------
## main --
##-------------------------------------------------------------------------------------------------
def main(bus,tname,log,elg):
"""
tests the: Front Panel LEMOS and transceiver IC16
uses the: lemo.py and svec_pts_leds_lemo.bin
"""
BUTTON_DETECT_REG = 0x100
BUTTON_CLEAR_REG = 0x108
pel = PTS_ERROR_LOGGER(log,elg)
try:
##-----------------------------------------------------------------------------------------
## LEMOs test --
##-----------------------------------------------------------------------------------------
for out in range(0,4): # all combinations of "output" and "output enable" for L1, L2
for enable in range(0,4):
inp = gpio(bus,out,enable)
msg = check(inp,out,enable)
if msg.find("OK") == -1:
pel.set(msg)
log.write("%s\n" % (msg))
return pel.get()
except BusException, e:
raise PtsError("VME Exception: %s" % (e))
except BusWarning, e:
raise PtsError("VME Warning: %s" % (e))
test/svec/python/one.py deleted 100644 → 0
View file @ 29d549ec
#! /usr/bin/python
# coding: utf8
import sys
import time
import traceback
import os
import subprocess
import re
sys.path.append('.')
if __name__ == '__main__':
print "\nHello and Welcome to the SVEC PTS Run One Test!\n"
fnull = open(os.devnull, "w")
tsts = [1,2,3,4,5,6,7,8,10,12,13,14,15,16,17]
tnum = input("--> Which test number:")
if tnum in tsts:
pass
else:
print "Sorry that test can't be run"
sys.exit(1)
tcnt = input("--> How many times to run test:")
if tcnt < 0:
print "Sorry bad run count"
sys.exit(1)
cmd = "ssh -X pts@men /home/pts/ubuntu/pts/jpts-run-one %d %d " % (tnum, tcnt)
subprocess.call(cmd, shell=True, stdout=fnull, stderr=fnull)
cmd = "more /home/pts/ubuntu/pts/log/*.log"
subprocess.call(cmd, shell=True, stdout=sys.stdout, stderr=sys.stderr)
msg = "--> To exit PTS Run One Test, type 'ok': "
ok = raw_input(msg)
while True:
if ok.find("ok") != -1 or ok.find("OK") != -1:
print "Exited PTS"
time.sleep(1)
sys.exit(1)
else:
ok = raw_input("--> To exit PTS Run One Test, type 'ok': ")
test/svec/python/pcb_version.py deleted 100644 → 0
View file @ 29d549ec
##_________________________________________________________________________________________________
## |
## |SVEC PTS| |
## |
## CERN,BE/CO-HT |
##________________________________________________________________________________________________|
##-------------------------------------------------------------------------------------------------
## |
## SVEC PCB version test |
## |
##-------------------------------------------------------------------------------------------------
## |
## Description Testing of the PCB version of the SVEC board; the version is indicated through |
## the PCBREV inputs to the application FPGA and the corresponding resistors. |
## |
## The firmware loaded to the application FPGA lathes the 5 PCBREV inputs and makes |
## them available to the VME interface at VME address "0x000". |
## A warning is issued if the version number is different than 0x02. |
## |
## The VME driver needs to map x1000 bytes of memory. |
## |
## FW to load svec_pts_pcbvers_pushbutt.bin |
## Authors Julian Lewis (Julian.Lewis@cern.ch) |
## Website http://www.ohwr.org/projects/pts |
## Date 19/02/2013 |
##-------------------------------------------------------------------------------------------------
##-------------------------------------------------------------------------------------------------
## GNU LESSER GENERAL PUBLIC LICENSE |
## ------------------------------------ |
## This source file is free software; you can redistribute it and/or modify it under the terms of |
## the GNU Lesser General Public License as published by the Free Software Foundation; either |
## version 2.1 of the License, or (at your option) any later version. |
## This source is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; |
## without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
## See the GNU Lesser General Public License for more details. |
## You should have received a copy of the GNU Lesser General Public License along with this |
## source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html |
##-------------------------------------------------------------------------------------------------
##-------------------------------------------------------------------------------------------------
## Import --
##-------------------------------------------------------------------------------------------------
# Import system modules
import sys
import time
import os, errno, re, sys, struct
import os.path
import traceback
# Import common modules
from ctypes import *
from ptsexcept import *
from vv_pts import *
##-------------------------------------------------------------------------------------------------
## main --
##-------------------------------------------------------------------------------------------------
def main(bus,tname,log,elg):
"""
tests the: PCB version number
uses the: pcb_version.py and svec_pts_pcbvers_pushbutt.bin
"""
PCB_VERSION_REG = 0x000
pel = PTS_ERROR_LOGGER(log,elg)
try:
# Reading the PCB_VERSION_REG register
version = bus.vv_read(PCB_VERSION_REG)
if version == 2:
msg = "PCB version: %d OK" % (version)
print msg
log.write(msg + '\n')
else:
msg = "WARNING: PCB version: %d is different than the expected: 2" %version
print msg
log.write(msg + '\n')
return pel.get()
except BusException, e:
raise PtsError("VME Exception: %s" % (e))
except BusWarning, e:
raise PtsError("VME Warning: %s" % (e))
test/svec/python/pts.py deleted 100644 → 0
View file @ 29d549ec
#! /usr/bin/python
# coding: utf8
import sys
import time
import traceback
import os
import subprocess
import re
sys.path.append('.')
def men_is_on():
on = 0
subprocess.call("/home/pts/ubuntu/pts/get-fan-speeds", shell=True, stdout=fnull, stderr=fnull)
btxt = tuple(open("/home/pts/ubuntu/pts/log/fan-speeds","r"))
for i in range(1,len(btxt)):
if btxt[i].find("INTEGER: 0") == -1:
on = on + 1
return on
def men_on():
tmo = 1
while men_is_on() == 0:
print "Try:%d Switching ON the VME Crate" % (tmo)
subprocess.call("/home/pts/ubuntu/pts/men-on", shell=True, stdout=fnull, stderr=fnull)
tmo = tmo + 1
if tmo > 10:
print "FATAL ERROR: VME Crate: Unable to switch ON"
sys.exit(1)
time.sleep(1)
def men_off():
tmo = 1
while men_is_on() != 0:
print "Try:%d Switching OFF the VME Crate" % (tmo)
subprocess.call("/home/pts/ubuntu/pts/men-off", shell=True, stdout=fnull, stderr=fnull)
tmo = tmo + 1
if tmo > 10:
print "FATAL ERROR: VME Crate: Unable to switch OFF"
sys.exit(1)
time.sleep(10)
if __name__ == '__main__':
print "\nHello and Welcome to the SVEC PTS!\n"
fnull = open(os.devnull, "w")
men_off()
while True:
sn1 = raw_input("--> Scan the 1st barcode: ")
m = re.search(r"[^a-z\-A-Z0-9_]+",sn1)
if m:
print "Bad character in barcode"
else:
break
while True:
sn2 = raw_input("--> Scan the 2nd barcode: ")
if len(sn2) > 2:
m = re.search(r"[^a-z\-A-Z0-9_]+",sn2)
if m:
print "Bad character in barcode"
else:
break
else:
sn2 = "0"
break
msg = "\n--> Plug the SVEC board '%s-%s' into the VME crate.\n Then type 'ok': " % (sn1, sn2)
ok = raw_input(msg)
while True:
if ok.find("ok") != -1 or ok.find("OK") != -1:
break
else:
ok = raw_input("--> Please type 'ok' to continue: ")
print "\n"
print "Initializing the test environment"
men_on()
subprocess.call("cd /home/pts/ubuntu/pts/boot/Flasher/production_flasher; ./flash_svec.sh", shell=True, stdout=fnull, stderr=fnull)
print "VME Crate power cycle"
men_off()
time.sleep(5)
men_on()
print "VME Crate booting...this will take 1 min"
time.sleep(60)
subprocess.call("cd /home/pts/ubuntu/pts; rm -rf ./log; mkdir log; chmod 777 log", shell=True, stdout=fnull, stderr=fnull)
subprocess.call("cd /home/pts/ubuntu/pts; ./allow_tty", shell=True, stdout=fnull, stderr=fnull)
time.sleep(10)
print "\nRunning tests!\n"
subprocess.call("/home/pts/ubuntu/pts/query-bootloader", shell=True, stdout=fnull, stderr=fnull)
sinfo = os.stat("/home/pts/ubuntu/pts/log/flash_result.txt")
if sinfo.st_size == 0:
print "FAIL: test00: Bootloader NOT Found"
print "ERROR: Flash IC14: Flash found empty after power cycle"
sys.exit(1)
else:
print "PASS: test00"
subprocess.call("/home/pts/ubuntu/pts/load-uart-test", shell=True, stdout=fnull, stderr=fnull)
subprocess.call("/home/pts/ubuntu/pts/run-uart-test", shell=True, stdout=fnull, stderr=fnull)
cmd = "ssh -X pts@men /home/pts/ubuntu/pts/jpts-men-root %s %s" % (sn1, sn2)
subprocess.call(cmd, shell=True, stdout=fnull, stderr=fnull)
subprocess.call("grep PASS /home/pts/ubuntu/pts/log/*.log", shell=True, stdout=sys.stdout, stderr=sys.stderr)
subprocess.call("grep FAIL /home/pts/ubuntu/pts/log/*.log", shell=True, stdout=sys.stdout, stderr=sys.stderr)
print "\nSaving test results on USB key"
try:
subprocess.call("mkdir -p /media/pts/log", shell=True, stdout=sys.stdout, stderr=sys.stderr)
subprocess.call("cp /home/pts/ubuntu/pts/log/*.log /media/pts/log", shell=True, stdout=sys.stdout, stderr=sys.stderr)
subprocess.call("cp /home/pts/ubuntu/pts/log/*.inf /media/pts/log", shell=True, stdout=sys.stdout, stderr=sys.stderr)
except e:
print "ERROR: No access to USB key at /media/pts"
print e
print "\nTesting completed!"
men_off()
msg = "\n--> To see all the PTS errors, type 'ok': "
ok = raw_input(msg)
if ok.find("ok") != -1:
subprocess.call("grep ERROR /home/pts/ubuntu/pts/log/*.inf", shell=True, stdout=sys.stdout, stderr=sys.stderr)
subprocess.call("grep WARNING /home/pts/ubuntu/pts/log/*.inf", shell=True, stdout=sys.stdout, stderr=sys.stderr)
print ""
print "--> You may now unplug the SVEC board %s-%s\n" % (sn1, sn2)
msg = "--> To exit PTS, type 'ok': "
ok = raw_input(msg)
while True:
if ok.find("ok") != -1 or ok.find("OK") != -1:
print "Exited PTS"
time.sleep(1)
sys.exit(1)
else:
ok = raw_input("--> To exit PTS, type 'ok': ")
test/svec/python/ptsexcept.py deleted 100644 → 0
View file @ 29d549ec
class PtsException(Exception):
pass
class PtsCritical(PtsException):
"""critical error, abort the whole test suite"""
pass
class PtsUser(PtsException):
"""error, user intervention required"""
pass
class PtsWarning(PtsException):
"""warning, a cautionary message should be displayed"""
pass
class PtsInvalid(PtsException):
"""reserved: invalid parameters"""
class PtsNoBatch(PtsInvalid):
"""reserved: a suite was created without batch of tests to run"""
pass
class PtsBadTestNo(PtsInvalid):
"""reserved: a bad test number was given"""
pass
class PtsInfo(PtsException):
"""Information from the test, not an error"""
class PtsError(PtsException):
"""error, continue remaining tests in test suite"""
pass
class PTS_ERROR_LOGGER:
"""Log errors and continue testing without raising an exception"""
def __init__(self, inf, log):
self.inf = inf
self.log = log
self.er_count = 0
def set(self, msg):
self.inf.write(msg + "\n")
self.log.write(msg + "\n")
self.er_count = self.er_count + 1
def get(self):
return self.er_count
if __name__ == '__main__':
pass
test/svec/python/push_button.py deleted 100644 → 0
View file @ 29d549ec
##_________________________________________________________________________________________________
## |
## |SVEC PTS| |
## |
## CERN,BE/CO-HT |
##________________________________________________________________________________________________|
##-------------------------------------------------------------------------------------------------
## |
## SVEC Push-Button test |
## |
##-------------------------------------------------------------------------------------------------
## |
## Description Testing of the Front Panel Push-Button of the SVEC board. |
## This test needs the operator's intervention; when prompted the operator needs to |
## press the Front Panel Push-Button of the SVEC under test. |
## |
## The firmware loaded to the application FPGA detects falling edges from the Push- |
## Button signal (note that the signal is active low, that is why falling edges are |
## the significant ones). |
## Upon falling edge detection the word x"DEC0DED" is written to VME address 0x100. |
## To clear the register in case the test needs to be repeated, "x01" needs to be |
## written to VME address 0x108 and then "x00". |
## |
## The operator should also confirm that the front panel LEDs of the board turn ON |
## in red color only when pushing the button. |
## |
## The VME driver needs to map x1000 bytes of memory. |
## |
## FW to load svec_pts_pcbvers_pushbutt.bin |
## Authors Julian Lewis (Julian.Lewis@cern.ch) |
## Website http://www.ohwr.org/projects/pts |
## Date 19/02/2013 |
##-------------------------------------------------------------------------------------------------
##-------------------------------------------------------------------------------------------------
## GNU LESSER GENERAL PUBLIC LICENSE |
## ------------------------------------ |
## This source file is free software; you can redistribute it and/or modify it under the terms of |
## the GNU Lesser General Public License as published by the Free Software Foundation; either |
## version 2.1 of the License, or (at your option) any later version. |
## This source is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; |
## without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
## See the GNU Lesser General Public License for more details. |
## You should have received a copy of the GNU Lesser General Public License along with this |
## source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html |
##-------------------------------------------------------------------------------------------------
##-------------------------------------------------------------------------------------------------
## Import --
##-------------------------------------------------------------------------------------------------
# Import system modules
import sys
import time
import os, errno, re, sys, struct
import os.path
import traceback
# Import common modules
from ctypes import *
from ptsexcept import *
from vv_pts import *
##-------------------------------------------------------------------------------------------------
## main --
##-------------------------------------------------------------------------------------------------
def main(bus,tname,log,elg):
"""
tests the: Front Panel Push-Button
uses the: push_button.py and svec_pts_pcbvers_pushbutt.bin
"""
pel = PTS_ERROR_LOGGER(log,elg)
inp = raw_input("--> Please press the front panel Push-Button.\n The LEDs should turn ON in red when pressing!\n Type 'ok' if OK: ")
if inp.find("ok") != -1 or inp.find("OK") != -1:
msg = "Push button works OK"
log.write("%s\n" % msg)
else:
msg = "ERROR: Push button test failed"
pel.set(msg)
return pel.get()
test/svec/python/sfp_eeprom.py deleted 100644 → 0
View file @ 29d549ec
##_________________________________________________________________________________________________
## |
## |SVEC PTS| |
## |
## CERN,BE/CO-HT |
##________________________________________________________________________________________________|
##-------------------------------------------------------------------------------------------------
## |
## SVEC SFP EEPROM test |
## |
##-------------------------------------------------------------------------------------------------
## |
## Description Testing of the "SFP EEPROM" chip on the SVEC board (SFP J4). The firmware loaded |
## to the application FPGA implements the interface for the communication between the|
## VME bus and the I2C of the SFP EEPROM; the interface is an I2C WISHBONE master, |
## running with a 50MHz system clock. |
## |
## The VME driver needs to map x1000 bytes of memory. |
## The I2C WISHBONE master can be accessed at VME base address x300. |
## The I2C address of the SFP EEPROM is x50, predefined in the part number. |
## |
## The test checks the presence of the SFP connector, reads the connector type and |
## verifies the received value. |
## |
## FW to load svec_pts_fmcsuppl_sfpeeprom.bin |
## Authors Julian Lewis (Julian.Lewis@cern.ch) |
## Website http://www.ohwr.org/projects/pts |
## Date 24/07/2012 |
##-------------------------------------------------------------------------------------------------
##-------------------------------------------------------------------------------------------------
## GNU LESSER GENERAL PUBLIC LICENSE |
## ------------------------------------ |
## This source file is free software; you can redistribute it and/or modify it under the terms of |
## the GNU Lesser General Public License as published by the Free Software Foundation; either |
## version 2.1 of the License, or (at your option) any later version. |
## This source is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; |
## without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
## See the GNU Lesser General Public License for more details. |
## You should have received a copy of the GNU Lesser General Public License along with this |
## source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html |
##-------------------------------------------------------------------------------------------------
##-------------------------------------------------------------------------------------------------
## Import --
##-------------------------------------------------------------------------------------------------
# Import system modules
import sys
import time
import os
# Import common modules
from ctypes import *
from ptsexcept import *
from vv_pts import *
##-------------------------------------------------------------------------------------------------
## I2C class --
##-------------------------------------------------------------------------------------------------
class COpenCoresI2C:
R_PREL = 0x0
R_PREH = 0x4
R_CTR = 0x8
R_TXR = 0xC
R_RXR = 0xC
R_CR = 0x10
R_SR = 0x10
CTR_EN = (1<<7)
CR_STA = (1<<7)
CR_STO = (1<<6)
CR_WR = (1<<4)
CR_RD = (1<<5)
CR_NACK = (1<<3)
SR_RXACK = (1<<7)
SR_TIP = (1<<1)
def scan_bus(self):
for i in range(0,128):
self.wr_reg(self.R_TXR, i<<1);
self.wr_reg(self.R_CR, self.CR_STA | self.CR_WR);
self.wait_busy()
self.wr_reg(self.R_CR, self.CR_STO);
self.wait_busy()
def wr_reg(self, addr, val):
self.bus.vv_write(self.base + addr,val)
def rd_reg(self,addr):
return self.bus.vv_read(self.base + addr)
def __init__(self, bus, base, prescaler):
self.bus = bus;
self.base = base;
self.wr_reg(self.R_CTR, 0);
self.wr_reg(self.R_PREL, (prescaler & 0xff))
self.wr_reg(self.R_PREH, (prescaler >> 8))
self.wr_reg(self.R_CTR, self.CTR_EN);
self.scan_bus()
def wait_busy(self):
tmo = 100
while(self.rd_reg(self.R_SR) & self.SR_TIP):
tmo = tmo -1
if tmo <= 0:
msg = "ERROR: SFP_EEPROM: Not responding"
raise PtsError(msg)
def start(self, addr, write_mode):
addr = addr << 1
if(write_mode == False):
addr = addr | 1;
self.wr_reg(self.R_TXR, addr);
self.wr_reg(self.R_CR, self.CR_STA | self.CR_WR);
self.wait_busy()
if(self.rd_reg(self.R_SR) & self.SR_RXACK):
pass
def write(self, data, last):
self.wr_reg(self.R_TXR, data);
cmd = self.CR_WR;
if(last):
cmd = cmd | self.CR_STO;
self.wr_reg(self.R_CR, cmd);
self.wait_busy();
if(self.rd_reg(self.R_SR) & self.SR_RXACK):
pass
def read(self, last):
cmd = self.CR_RD;
if(last):
cmd = cmd | self.CR_STO | self.CR_NACK;
self.wr_reg(self.R_CR, cmd);
self.wait_busy();
return self.rd_reg(self.R_RXR);
##-------------------------------------------------------------------------------------------------
## EEPROM SFP class --
##-------------------------------------------------------------------------------------------------
class EEPROM_SFP:
def __init__(self, i2c, addr):
self.i2c = i2c;
self.addr = addr;
def wr_reg16(self, addr, value):
self.i2c.start(self.addr, True);
self.i2c.write(addr, False);
tmp = (value >> 8) & 0xFF;
self.i2c.write(value, False);
tmp = value & 0xFF;
self.i2c.write(value, True)
def wr_reg8(self, addr, value):
self.i2c.start(self.addr, True);
self.i2c.write(addr, False);
self.i2c.write(value, True);
def rd_reg16(self, addr):
self.i2c.start(self.addr, True);
self.i2c.write(addr, False);
self.i2c.start(self.addr, False);
tmp_MSB = self.i2c.read(False);
tmp_LSB = self.i2c.read(True);
value = (tmp_MSB << 8) | tmp_LSB;
return value;
def rd_reg8(self, addr):
self.i2c.start(self.addr, True);
self.i2c.write(addr, False);
self.i2c.start(self.addr, False);
return self.i2c.read(True);
##-------------------------------------------------------------------------------------------------
## main --
##-------------------------------------------------------------------------------------------------
def main(bus,tname,log,elg):
"""
tests the: SFP EEPROM J4
uses the: sfp_eeprom.py and svec_pts_fmcsuppl_sfpeeprom.bin
"""
SFP_EEPROM_ADDR = 0x50
SFP_EEPROM_I2C_WB_ADDR = 0x300
pel = PTS_ERROR_LOGGER(log,elg)
try:
i2c = COpenCoresI2C(bus, SFP_EEPROM_I2C_WB_ADDR, 99); # prescaler value (99), calculated for 50MHz clk
eeprom = EEPROM_SFP(i2c, SFP_EEPROM_ADDR);
type = eeprom.rd_reg8(0x0);
log.write("SFP type: " + hex(type) + "\n")
if (type == 3) :
log.write("SFP type is correct\n")
else:
msg = "ERROR: SFP-EEPROM: Wrong connector type. It should be 0x3."
pel.set(msg)
return pel.get()
except BusException, e:
raise PtsError("VME Exception: %s" % (e))
except BusWarning, e:
raise PtsError("VME Warning: %s" % (e))
#finally:
# return pel.get()
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#!/bin/bash
sudo python /home/lewis/Desktop/svec_pts/pts/new/write_to_usb_test.py &
exit
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##_________________________________________________________________________________________________
## |
## |SVEC PTS| |
## |
## CERN,BE/CO-HT |
##________________________________________________________________________________________________|
##-------------------------------------------------------------------------------------------------
## |
## SVEC USB2UART test |
## |
##-------------------------------------------------------------------------------------------------
## |
## Description Testing of the "USB to UART" chip IC17. For this test a USB cable needs to be |
## plugged between a USB port of the PC and the USB connector of the SVEC under test.|
## |
## This python test is used in companion with the dummy_usb_uart.py. |
## It writes the altpabet to the USB port of the PC. The firmware loaded to the |
## Application FPGA implements a loop between the transmitter and the receiver of the|
## USB to UART chip. |
## ________ __________ _____________ |
## | | | txd | | |
## | USB | |---------->|--. | |
## PC |<---------->| USB2UART | rxd | | AFPGA | |
## | | |<----------|--. | |
## ________| |__________| |_____________| |
## |
## Note that in this test there is no implication of the VME interface. |
## |
## FW to load svec_pts_usb_vmep2.bin |
## Authors Julian Lewis (Julian.Lewis@cern.ch) |
## Website http://www.ohwr.org/projects/pts |
## Date 24/07/2012 |
##-------------------------------------------------------------------------------------------------
##-------------------------------------------------------------------------------------------------
## GNU LESSER GENERAL PUBLIC LICENSE |
## ------------------------------------ |
## This source file is free software; you can redistribute it and/or modify it under the terms of |
## the GNU Lesser General Public License as published by the Free Software Foundation; either |
## version 2.1 of the License, or (at your option) any later version. |
## This source is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; |
## without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
## See the GNU Lesser General Public License for more details. |
## You should have received a copy of the GNU Lesser General Public License along with this |
## source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html |
##-------------------------------------------------------------------------------------------------
##-------------------------------------------------------------------------------------------------
## Import --
##-------------------------------------------------------------------------------------------------
# Import system modules
import serial
import time
##-------------------------------------------------------------------------------------------------
## main --
##-------------------------------------------------------------------------------------------------
def main():
"""
writes the alphabet to the USB and reads it back
"""
alpha = list("abcdefghijklmnopqrstuvwxyz")
try:
fn = "/home/pts/ubuntu/pts/log/usb_test_result.txt"
res = open(fn,"w");
except:
msg = "ERROR: Can't open %s for write" % (fn)
raise PtsError(msg)
ser = serial.Serial(port='/dev/ttyUSB0', baudrate=115200, timeout=5);
ser.flushOutput()
msg = "PASS USB-UART test\n"
for ch in alpha:
ser.write(ch)
ser.flush()
rc = ser.read()
if len(rc) == 0:
msg = "ERROR: USB-UART IC17: Not responding"
break;
if rc != ch:
msg = "ERROR: USB-UART IC17: Unexpected character received:0x%x expected:0x%x\n" % (rc,ch)
break
res.write(msg)
res.close()
print msg
if __name__ == '__main__':
main()
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##_________________________________________________________________________________________________
## |
## |SVEC PTS| |
## |
## CERN,BE/CO-HT |
##________________________________________________________________________________________________|
##-------------------------------------------------------------------------------------------------
## |
## SVEC VME P2 test |
## |
##-------------------------------------------------------------------------------------------------
## |
## Description Testing of the VME P2 connector pins. The "P2 tester board" needs to be plugged on|
## the VME P2 slot. The connector performs the looping of signals. Half of the P2 |
## signals arriving to the FPGA serve as ouptuts and the rest as inputs. Through the |
## VME interface we set the outputs and read back the inputs. |
## |
## There are also 2 clock signals on the P2 connector. To evaluate each clock there |
## is a dedicated counter that is monitored and controlled by the VME interface. |
## |
## In total x1000 bytes of memory need to be mapped by the VME driver. |
## The P2 inputs can be accessed at the 17 LSB of VME address x200. |
## The P2 outputs can be accessed at the 17 LSB of VME address x204. |
## The VME base address for the PLLFMC1_CLK counter is x000. |
## The VME base address for the PLLFMC1_CLK counter is x100. |
## In detail these are the VME registers used for the control&evaluation of the clks:|
## base_addr + 0x10, bits 31..0: number of cycles counted so far |
## base_addr + 0x14, bit 0: counter reset, active high |
## base_addr + 0x18, bit 0: counter enable, active high |
## |
## FW to load svec_pts_usb_vmep2.bin |
## Authors Julian Lewis (Julian.Lewis@cern.ch) |
## Website http://www.ohwr.org/projects/pts |
## Date 24/07/2012 |
##-------------------------------------------------------------------------------------------------
##-------------------------------------------------------------------------------------------------
## GNU LESSER GENERAL PUBLIC LICENSE |
## ------------------------------------ |
## This source file is free software; you can redistribute it and/or modify it under the terms of |
## the GNU Lesser General Public License as published by the Free Software Foundation; either |
## version 2.1 of the License, or (at your option) any later version. |
## This source is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; |
## without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
## See the GNU Lesser General Public License for more details. |
## You should have received a copy of the GNU Lesser General Public License along with this |
## source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html |
##-------------------------------------------------------------------------------------------------
##-------------------------------------------------------------------------------------------------
## Import --
##-------------------------------------------------------------------------------------------------
# Import system modules
import sys
import time
import os
import traceback
# Import common modules
from ctypes import *
from ptsexcept import *
from vv_pts import *
##-------------------------------------------------------------------------------------------------
# File with Pinout List --
##-------------------------------------------------------------------------------------------------
class PIN_STR:
def __init__(self):
self.btxt = tuple(open("./pyts/SVEC_VMEP2_pinout.txt","r"))
def get(self,pin):
for i in range(0,len(self.btxt)):
mch = "%02d:" % (pin)
if self.btxt[i].find(mch) != -1:
return self.btxt[i][3:].strip()
return "Not Used"
##-------------------------------------------------------------------------------------------------
## main --
##-------------------------------------------------------------------------------------------------
def main(bus,tname,log,elg):
"""
tests the: VME P2 connector
uses the: vmep2.py and svec_pts_usb_vmep2.bin
"""
VMEP2_INP = 0x200
VMEP2_OUT = 0x204
VMEP2_PIN = range(0,18)
FMC_CLK_WB_ADDR = [0x000, 0x100]
CTOP = 0x0C
CVAL = 0x10
CRES = 0x14
CENB = 0x18
COUNTER_2SEC = 250000000 # Expected value of a 125MHz counter after 2sec
COUNTER_MARGIN = 12500000 # Expected value of a 125MHz counter after 100msec
pel = PTS_ERROR_LOGGER(log,elg)
try:
# Test of the pins of the P2 connector
pin_str = PIN_STR()
for pin in VMEP2_PIN:
msk = 1 << pin
bus.vv_write(VMEP2_OUT,msk)
if bus.vv_read(VMEP2_INP) == msk:
msg = "VME P2: Pins: %s OK\n" % (pin_str.get(pin))
log.write(msg)
else:
msg = "ERROR: VME P2: Pins: %s\n" % (pin_str.get(pin))
pel.set(msg)
# Test of the fmc clocks of the P2 connector: P2_PLLFMC1_CLK and P2_PLLFMC1_CLK
for base_address in FMC_CLK_WB_ADDR:
bus.vv_write(base_address + CENB, 1) # Enable the counter
bus.vv_write(base_address + CRES, 1) # Reset the counter
cval = bus.vv_read(base_address + CVAL)
bus.vv_write(base_address + CRES, 0) # Remove reset
time.sleep(2) # counter counting for 2 sec..
cval = bus.vv_read(base_address + CVAL) # Read after 2s
if (cval > (COUNTER_2SEC-COUNTER_MARGIN)) and (cval < (COUNTER_2SEC+COUNTER_MARGIN)):
msg = "P2_PLLFMC%d_CLK: Frequency OK; Counter value after 2sec: %d is within range[%d .. %d]" % (FMC_CLK_WB_ADDR.index(base_address) + 1, cval, COUNTER_2SEC-COUNTER_MARGIN, COUNTER_2SEC+COUNTER_MARGIN)
log.write("%s\n" % (msg))
else:
msg = "ERROR: P2_PLLFMC%d_CLK: Wrong frequency; Counter value after 2sec: %d out of range[%d .. %d]" % (FMC_CLK_WB_ADDR.index(base_address) + 1, cval, COUNTER_2SEC-COUNTER_MARGIN, COUNTER_2SEC+COUNTER_MARGIN)
pel.set(msg)
return pel.get()
except BusException, e:
raise PtsError("VME Exception: %s" % (e))
except BusWarning, e:
raise PtsError("VME Warning: %s" % (e))
#finally:
# return pel.get()
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