Commit f23a9beb authored by Matthieu Cattin's avatar Matthieu Cattin

common: Fix exception class call. Was calling I2C exeptions instead of SPI ones.

parent 3cd3f4a2
...@@ -69,7 +69,7 @@ class COpenCoresSPI: ...@@ -69,7 +69,7 @@ class COpenCoresSPI:
init_time=time.time() init_time=time.time()
while(self.rd_reg(self.R_CTRL) & self.CTRL_BSY): while(self.rd_reg(self.R_CTRL) & self.CTRL_BSY):
if (time.time()-init_time) > self.WAIT_TIME_OUT: if (time.time()-init_time) > self.WAIT_TIME_OUT:
raise I2CDeviceOperationError(self.base_addr, "Wait timeout") raise SPIDeviceOperationError(self.base_addr, "Wait timeout")
def config(self, ass, rx_neg, tx_neg, lsb, ie): def config(self, ass, rx_neg, tx_neg, lsb, ie):
self.conf = 0 self.conf = 0
...@@ -96,7 +96,7 @@ class COpenCoresSPI: ...@@ -96,7 +96,7 @@ class COpenCoresSPI:
self.wr_reg(self.R_TX[i], txrx[i]) self.wr_reg(self.R_TX[i], txrx[i])
#print '[SPI] data length: 0x%X' % len(data) #print '[SPI] data length: 0x%X' % len(data)
if slave > len(self.SS_SEL): if slave > len(self.SS_SEL):
raise I2CDeviceOperationError(self.base_addr, "Maximum number of slaves is %d" % len(self.SS_SEL)) raise SPIDeviceOperationError(self.base_addr, "Maximum number of slaves is %d" % len(self.SS_SEL))
self.wr_reg(self.R_SS, self.SS_SEL[slave]) self.wr_reg(self.R_SS, self.SS_SEL[slave])
self.wr_reg(self.R_CTRL, (self.LGH_MASK & (len(data)<<3)) | self.CTRL_GO | self.conf) self.wr_reg(self.R_CTRL, (self.LGH_MASK & (len(data)<<3)) | self.CTRL_GO | self.conf)
self.wait_busy() self.wait_busy()
......
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