pax_global_header 0000666 0000000 0000000 00000000064 12334362606 0014517 g ustar 00root root 0000000 0000000 52 comment=81af9aa42e87355c7ea68432260be70898e8ad69
pts-base-81af9aa42e87355c7ea68432260be70898e8ad69/ 0000775 0000000 0000000 00000000000 12334362606 0020127 5 ustar 00root root 0000000 0000000 pts-base-81af9aa42e87355c7ea68432260be70898e8ad69/LICENSE 0000664 0000000 0000000 00000001327 12334362606 0021137 0 ustar 00root root 0000000 0000000 Production Test Suite, automatized tests for OHWR boards.
Copyright (C) 2011 CERN
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 2 of the License, or
any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see .
pts-base-81af9aa42e87355c7ea68432260be70898e8ad69/README 0000664 0000000 0000000 00000000215 12334362606 0021005 0 ustar 00root root 0000000 0000000 This is Production Test Suite project.
Supporting automated hardware testing at BE/CO/HT
since 2011 or even less
License: GPL v2 or later
pts-base-81af9aa42e87355c7ea68432260be70898e8ad69/common/ 0000775 0000000 0000000 00000000000 12334362606 0021417 5 ustar 00root root 0000000 0000000 pts-base-81af9aa42e87355c7ea68432260be70898e8ad69/common/csr.py 0000664 0000000 0000000 00000002171 12334362606 0022561 0 ustar 00root root 0000000 0000000 #!/usr/bin/python
# Copyright CERN, 2011
# Author: Matthieu Cattin (CERN)
# Licence: GPL v2 or later.
# Website: http://www.ohwr.org
# Last modifications: 27/4/2012
# Import standard modules
import sys
import time
# Import specific modules
import rr
# Class to access 32-bit wishbone registers on BAR0
class CSRDeviceOperationError(Exception):
def __init__(self, msg):
self.msg = msg
def __str__(self):
return ("CSR Device produced the error: %s" %(msg))
class CCSR:
def __init__(self, bus, base_addr):
self.base_addr = base_addr;
self.bus = bus;
def wr_reg(self, addr, val):
#print '[CSR] wr:%.8X reg:%.8X' % (val,(self.base_addr+addr))
self.bus.iwrite(0, self.base_addr + addr, 4, val)
def rd_reg(self, addr):
reg = self.bus.iread(0, self.base_addr + addr, 4)
#print '[CSR] reg:%.8X value:%.8X' % ((self.base_addr+addr), reg)
return reg
def wr_bit(self, addr, bit, value):
reg = self.rd_reg(addr)
if(0==value):
reg &= ~(1<