This version of ppsi, currently submodule of proposed_master of
wr-switch-sw, is not building because of INT_MAX, UINT_MAX and the like.

This includes <limits.h> in all files where this is needed.

Obviously, <limits.h> will be missing in wrpc-sw and bare builds, but
this version does not build for most architectures anyways (including
arch-unix).
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

The fields in timePropertiesDS are been reevaluated. The file bmc.c
contains a table showing the different use cases.

For a GM the FSM must not be called until:
- the timing mode has not been programmed
- the clock quality has not been verified

During intensive tests playing with ports up and down, the select() call
returned sometime the error value EINVAL because the given timeout was
negative.

This modification avoids duplication of files.

In the new HAL version supporting LPDC, HAL set the timing mode to FR
and it must not be changed during all the calibration phase. So PPSI
needs to wait the end of the calibration before to change the timing
mode to GM if it is needed.
Also PPSi waits the end of HAL calibration before to consider a link up
on any port.

This new state is used by PPSi the end of the initialization of all
ports before starting to change the timing mode. This is particularly
the case for the GM mode which is set during the initialization of PPSi.

- Update the local definition of the HAL share memory
- Hide some structure specific to HAL like LPDC support

The port left led should indicate when the port is non-WR/HA.
This was not the case as a non WR/HA port in Master/Slave
state would still indicate WR link (should be "other").
This was corrected

The HAL states and the HAL share memory have changed. PPSi must follow
these modifications.

Due to C library changes the tai field is now available in the structure
timex,

As HA profile, the WR profile must always have the  asymmetryCorrection
enabled.

In the previous code all these values where hardcoded and thus difficult
to port to a device similar to wrs without needing to fully rewrite the
wrs-time.c. With this new code the user can now modify the device to
access to FPGA and the offset of RT subsystem.

For security we still use define in the case that the hal as not
properly set these value.

When the link state changes rapidly, it can't be detected by PPSi. This
is the case with the BTrain configuration. So we must detect that the
peer has changed and restart the servo for a slave and use the right
protocol (extension/ptp).

The WR time is set in GM mode as follow :
1/ At startup the NTP time is set using wr_date script
2/ PPSi calls the tool wr_date with parameters "set host". It will be
called every time it detects a PLL transition from UNLOCKED to LOCKED
state. Also PPSi provide a error counter 'gmUnlockErr' which gives the
number of time the PLL unlocked.
3/ Parameters "-v set host" in wr_date tool, set only the second part of
the WR time. The time is set in a middle of two WR seconds ticks.

As the enable_output_timing() hook  is called also in the standard PTP
part, the hook has been moved from the WR specific structure
wrh_operations to  pp_time_operations

- Add a new state machine available for all timing modes ( Free running
master, Grand master and boundary clock)
- State is stored in pp_globals, field timingModeLockingState
- The 3 main states are :
-- Locking: Waiting for PLL locked
-- Locked: PLL is locked
-- Error: PLL is unlocked but was locked before
- Changing the timing mode will reset the state to 'Locking'

- Calculations made using fixed pointarythmetic
- delayAsymCoeff calculated using polynomial expansion
- Based on Rens Roosenstein work

The logic used to control WR switch leds is removed from HAL and
imported into PPSi. It prevents HAL from reading PPSi shared memory.

Modification made to be more coherent as delayCoefficient is in range [-1,1] instead of [-2,2].

This is a temporary implementation that will be reviewed when the PPSi
live configuration will be implemented.

add monitor variable to struct hal_port_state
Signed-off-by: Adam Wujek <adam.wujek@cern.ch>

See commit 'Simplify WRS calibration functions' below

- Has Hal is no longer used for ingress/egress latencies, we must then
take them from the configuration file
- Definition used by the common servo (WR & HA)
- Implementation of the IDLE state
See previous commit 'Review of WR protocol implementation'

See commit 'Simplify WRS calibration functions' below

As WR extension share now the same servo than L1Sync extension, the only
service required from HAL is the value of the bit-slide. Then a
simplification can be done by removing some functions and some obsolete
function parameters