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fcdf0c61
Commit
fcdf0c61
authored
Jun 29, 2010
by
Javier Serrano
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Some small changes for clarity. Change of title.
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oh_soleil_20100630.tex
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oh_soleil_20100630/oh_soleil_20100630.tex
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fcdf0c61
...
...
@@ -47,8 +47,8 @@
% does not look nice, try deleting the line with the fontenc.
\title
[
White Rabbit and common HW platform
]
% (optional, use only with long paper titles)
{
White Rabbit Time Distribution System and Common Platform for Machine Instrumentation
}
\title
[
New HW solutions for LHC injectors
]
% (optional, use only with long paper titles)
{
New hardware solutions for the control of LHC injectors
}
\subtitle
{
Plus some reflections on Open Hardware
}
...
...
@@ -278,7 +278,7 @@
\end{frame}
\begin{frame}
{
Ongoing developments
}{
1/2
}
\begin{block}
{
C
arriers
}
\begin{block}
{
WR-enabled c
arriers
}
\begin{itemize}
\item
VME with two single-width (one double-width) slots.
\item
PCIe with one single-width slot.
...
...
@@ -295,9 +295,9 @@
\item
Simple parallel digital I/O.
\item
Under discussion:
\begin{itemize}
\item
F
our-channel 16-bit 120 MS/s sample
r.
\item
Four-channel 16-bit 120 MS/s DAC
.
\item
Clock generator based on 1 GS/s 32-bit DDS
.
\item
F
ine delay generato
r.
\item
Time-to-Digital Converter (TDC)
.
\item
Four-channel 100 MS/s DAC
.
\item
One-channel 24-bit 2 MS/s sampler.
\end{itemize}
\end{itemize}
...
...
@@ -444,7 +444,7 @@ Up to 2000 nodes.
\begin{block}
{
Common clock for the entire network
}
\begin{itemize}
\item
All network nodes use the same physical layer clock, generated by the System Timing Master
\item
All network nodes use the same physical layer clock, generated by the System Timing Master
.
\item
Clock is encoded in the Ethernet carrier and recovered by the PLL in the PHY.
\end{itemize}
\end{block}
...
...
@@ -516,7 +516,7 @@ Up to 2000 nodes.
\begin{frame}
{
The WR protocol
}
% it's completely transparent
\begin{block}
{
Preemption mechanism
}
\begin{block}
{
Preemption mechanism
(preliminary ideas)
}
When a HP packet arrives at the switch, SP packet currently being routed is terminated so the HP packet can be sent out with minimal latency.
The remaining part of terminated SP packet is sent later.
\end{block}
...
...
@@ -529,11 +529,11 @@ Up to 2000 nodes.
\subsection
{
Work so far
}
\begin{frame}
{
Simulation results
}{
High throughput and determinism achieved simultaneously
}
\begin{center}
\includegraphics
[height=6.5cm]
{
../pictures/hostB.pdf
}
\end{center}
\end{frame}
%
\begin{frame}{Simulation results}{High throughput and determinism achieved simultaneously}
%
\begin{center}
%
\includegraphics[height=6.5cm]{../pictures/hostB.pdf}
%
\end{center}
%
\end{frame}
\begin{frame}
{
Switch design
}
\begin{center}
...
...
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