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nanoFIP - Gateware
Commit d96c6aaa authored by egousiou's avatar egousiou
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JTAG working version (JTAG_player unit added); 

also changes on engine control (added state rst_rx) and status_bytes_gen (CRC_wrong check done only for RP_DAT frames)

git-svn-id: http://svn.ohwr.org/cern-fip/trunk/hdl/design@228 7f0067c9-7624-46c7-bd39-3fb5400c0213
parent 885d5b83
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Showing with 179 additions and 55 deletions
nanofip.vhd
View file @ d96c6aaa
......@@ -279,6 +279,14 @@ entity nanofip is
-- User Interface, JTAG Controller
TP39 : out std_logic;
TP10 : out std_logic;
TP11 : out std_logic;
TP12 : out std_logic;
TP13 : out std_logic;
TP14 : out std_logic;
TP15 : out std_logic;
jc_tms_o : out std_logic;
jc_tdi_o : out std_logic;
jc_tck_o : out std_logic
......@@ -329,7 +337,9 @@ architecture struc of nanofip is
signal s_wb_ack_prod : std_logic;
-- WF_model_constr_dec outputs
signal s_jc_mem_adr_rd : std_logic_vector (8 downto 0);
signal jc_tdo_byte_o : std_logic_vector (7 downto 0);
signal s_jc_tdo_byte : std_logic_vector (7 downto 0);
signal s_jc_tdi_o, s_jc_tms_o, s_jc_tck_o, s_fd_txd_o : std_logic;
--=================================================================================================
......@@ -445,6 +455,7 @@ begin
var2_rdy_i => s_var2_rdy,
model_id_dec_i => s_model_id_dec,
constr_id_dec_i => s_constr_id_dec,
jc_tdo_byte_i => s_jc_tdo_byte,
-------------------------------------------------------------
byte_o => s_byte_to_tx,
u_cacer_o => u_cacer_o,
......@@ -472,12 +483,12 @@ begin
-------------------------------------------------------------
tx_byte_request_p_o => s_tx_request_byte_p,
tx_completed_p_o => s_tx_completed_p,
tx_data_o => fd_txd_o,
tx_data_o => s_fd_txd_o,
tx_enable_o => fd_txena_o,
tx_clk_o => fd_txck_o);
-------------------------------------------------------------
fd_txd_o <= s_fd_txd_o;
---------------------------------------------------------------------------------------------------
-- WF_JTAG_player --
......@@ -491,14 +502,23 @@ begin
jc_start_p_i => s_jc_start_p,
jc_tdo_i => jc_tdo_i,
-----------------------------------------------------------------
jc_tms_o => jc_tms_o,
jc_tdi_o => jc_tdi_o,
jc_tck_o => jc_tck_o,
jc_tdo_byte_o => jc_tdo_byte_o,
jc_tms_o => s_jc_tms_o,
jc_tdi_o => s_jc_tdi_o,
jc_tck_o => s_jc_tck_o,
jc_tdo_byte_o => s_jc_tdo_byte,
jc_mem_adr_rd_o => s_jc_mem_adr_rd);
-----------------------------------------------------------------
TP39 <= jc_tdo_i;
TP10 <= s_jc_tms_o;
TP11 <= s_jc_tdi_o;
TP12 <= s_jc_tck_o;
TP13 <= s_rx_crc_wrong_p;
TP14 <= s_rx_fss_received_p;
TP15 <= s_rx_fss_crc_fes_ok_p;
jc_tms_o <= s_jc_tms_o;
jc_tdi_o <= s_jc_tdi_o;
jc_tck_o <= s_jc_tck_o;
---------------------------------------------------------------------------------------------------
-- WF_engine_control --
......
wf_engine_control.vhd
View file @ d96c6aaa
This diff is collapsed.
wf_jtag_player.vhd
View file @ d96c6aaa
......@@ -139,7 +139,7 @@ architecture rtl of WF_jtag_player is
signal s_bytes_c, s_bytes_c_d1 : unsigned (6 downto 0);
signal s_tck_c : unsigned (4 downto 0);
signal s_frame_size_lsb, s_frame_size_msb : std_logic_vector (7 downto 0);
signal s_jc_tdo_byte : std_logic_vector (7 downto 0);
signal s_jc_tdo_bit : std_logic;
signal s_frame_size : unsigned (15 downto 0);
--=================================================================================================
......@@ -186,16 +186,8 @@ begin
end if;
when set_address =>
if s_bytes_c < 2 then -- getting size bytes
nx_jtag_pl_st <= get_byte;
else
if resize((s_bytes_c sll 3), s_frame_size'length) > s_frame_size then
nx_jtag_pl_st <= idle;
else
nx_jtag_pl_st <= get_byte;
end if;
end if;
when get_byte =>
if s_bytes_c < 2 then -- getting size bytes
......@@ -205,16 +197,27 @@ begin
end if;
when play_byte =>
if s_frame_size = 0 then --
nx_jtag_pl_st <= idle;
if s_frame_size - resize((s_bytes_c sll 3), s_frame_size'length) >= 8 then --complete bytes
elsif s_frame_size - ((resize((s_bytes_c-2), s_frame_size'length)) sll 3) > 8 then -- complete bytes
if s_tck_c_is_full = '1' then
nx_jtag_pl_st <= set_address;
else
nx_jtag_pl_st <= play_byte;
end if;
else
if s_tck_c <= (s_frame_size - resize((s_bytes_c sll 3), s_frame_size'length)) sll 2 then --last byte/ bits
elsif s_frame_size - ((resize((s_bytes_c-2), s_frame_size'length)) sll 3) = 8 then-- last complete byte
if s_tck_c_is_full = '1' then
nx_jtag_pl_st <= idle;
else
nx_jtag_pl_st <= play_byte;
end if;
else -- last bits
if s_tck_c < ((s_frame_size - (resize((s_bytes_c-2), s_frame_size'length) sll 3)) sll 2)-1 then
nx_jtag_pl_st <= play_byte;
else
nx_jtag_pl_st <= idle;
......@@ -308,7 +311,7 @@ begin
-- Combinatorial process that according to the state of the FSM sets values to the
-- Incoming_Bits_Index inputs.
Bit_Index: process (s_idle, s_get_size, s_get_byte, s_play_byte)
Bit_Index: process (s_idle, s_get_size, s_set_adr, s_get_byte, s_play_byte)
begin
if s_idle ='1' then
......@@ -376,7 +379,7 @@ begin
s_tck_d1 <= '0';
s_bytes_c_d1 <= (others => '0');
s_frame_size_msb <= (others => '0');
s_frame_size_msb <= (others => '0');
s_frame_size_lsb <= (others => '0');
else
s_tck_d1 <= s_tck;
s_bytes_c_d1 <= s_bytes_c;
......@@ -401,10 +404,6 @@ begin
begin
if falling_edge (s_tck_d1) then
if nfip_rst_i = '1' then
jc_tms_o <= '0';
jc_tdi_o <= '0';
else
if s_tck_c < 4 then
jc_tms_o <= jc_mem_data_i(7);
jc_tdi_o <= jc_mem_data_i(6);
......@@ -426,7 +425,6 @@ begin
jc_tdi_o <= jc_mem_data_i(6);
end if;
end if;
end if;
end process;
......@@ -435,15 +433,15 @@ begin
if rising_edge (s_tck_d1) then
if nfip_rst_i = '1' or s_idle= '1' then
s_jc_tdo_byte <= (others => '0');
s_jc_tdo_bit <= '0';
else
s_jc_tdo_byte <= s_jc_tdo_byte (6 downto 0) & jc_tdo_i;
s_jc_tdo_bit <= jc_tdo_i;
end if;
end if;
end process;
jc_tdo_byte_o <= s_jc_tdo_byte;
jc_tdo_byte_o <= "0000000" & s_jc_tdo_bit;
end architecture rtl;
......
wf_package.vhd
View file @ d96c6aaa
......@@ -543,8 +543,8 @@ end component WF_rx_osc;
var1_acc_a_i : in std_logic;
var2_acc_a_i : in std_logic;
var3_acc_a_i : in std_logic;
fd_txer_a_i : in std_logic;
fd_wdgn_a_i : in std_logic;
fd_txer_a_i : in std_logic;
fd_wdgn_a_i : in std_logic;
byte_index_i : in std_logic_vector (7 downto 0);
data_lgth_i : in std_logic_vector (7 downto 0);
byte_request_accept_p_i : in std_logic;
......@@ -553,8 +553,9 @@ end component WF_rx_osc;
var2_rdy_i : in std_logic;
nfip_status_r_fcser_p_i : in std_logic;
nfip_status_r_tler_p_i : in std_logic;
constr_id_dec_i : in std_logic_vector (7 downto 0);
model_id_dec_i : in std_logic_vector (7 downto 0);
constr_id_dec_i : in std_logic_vector (7 downto 0);
model_id_dec_i : in std_logic_vector (7 downto 0);
jc_tdo_byte_i : in std_logic_vector (7 downto 0);
-----------------------------------------------------------------
byte_o : out std_logic_vector (7 downto 0);
u_cacer_o : out std_logic;
......@@ -624,6 +625,7 @@ end component WF_rx_osc;
byte_index_i : in std_logic_vector (7 downto 0);
byte_being_sent_p_i : in std_logic;
var3_rdy_i : in std_logic;
jc_tdo_byte_i : in std_logic_vector (7 downto 0);
-----------------------------------------------------------------
rst_status_bytes_p_o : out std_logic;
byte_o : out std_logic_vector (7 downto 0));
......@@ -782,6 +784,7 @@ end component WF_rx_osc;
nfip_status_r_tler_p_i : in std_logic;
nfip_status_r_fcser_p_i : in std_logic;
rst_status_bytes_p_i : in std_logic;
var_i : in t_var;
-----------------------------------------------------------------
u_cacer_o : out std_logic;
u_pacer_o : out std_logic;
......
wf_prod_bytes_retriever.vhd
View file @ d96c6aaa
......@@ -159,6 +159,8 @@ entity WF_prod_bytes_retriever is
constr_id_dec_i : in std_logic_vector (7 downto 0); -- decoded constructor id settings
model_id_dec_i : in std_logic_vector (7 downto 0); -- decoded model id settings
-- Signals from the WF_jtag_player unit
jc_tdo_byte_i : in std_logic_vector (7 downto 0); -- 8 last JC_TDO bits
-- OUTPUTS
-- Signal to the WF_status_bytes_gen
......@@ -260,7 +262,7 @@ begin
Bytes_Generation: process (var_i, s_byte_index_d1, data_lgth_i, constr_id_dec_i, model_id_dec_i,
nFIP_status_byte_i, mps_status_byte_i, s_slone_byte, s_byte_index_d_aux,
s_mem_byte, nostat_i, byte_being_sent_p_i, s_lgth_byte, slone_i)
s_mem_byte, nostat_i, byte_being_sent_p_i, s_lgth_byte, slone_i, jc_tdo_byte_i)
begin
......@@ -403,6 +405,52 @@ begin
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
-- case: jatg produced
-- For ..............
when var_jc3 =>
s_base_addr <= (others => '0'); -- no memory access needed
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
-- The first (Control) and second (PDU type) bytes to be sent
-- are predefined in the c_VARS_ARRAY matrix of the WF_package
if unsigned(s_byte_index_d1) <= c_VARS_ARRAY(c_VAR_JC3_INDEX).array_lgth then -- less or eq
byte_o <= c_VARS_ARRAY(c_VAR_JC3_INDEX).byte_array(s_byte_index_d_aux);
rst_status_bytes_p_o <= '0';
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
-- The &c_LGTH_BYTE_INDEX byte is the Length
elsif s_byte_index_d1 = c_LGTH_BYTE_INDEX then
byte_o <= s_lgth_byte;
rst_status_bytes_p_o <= '0';
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
-- The one but last byte is the nanoFIP status byte
elsif unsigned(s_byte_index_d1) = (unsigned(data_lgth_i)-1 ) then
byte_o <= nFIP_status_byte_i;
rst_status_bytes_p_o <= '0';
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
-- The last byte is the MPS status
elsif s_byte_index_d1 = data_lgth_i then
byte_o <= mps_status_byte_i;
rst_status_bytes_p_o <= byte_being_sent_p_i; -- reset signal for both status bytes.
-- The reset arrives after having sent the
-- MPS byte to the WF_tx_serializer.
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
-- The other byte comes from the JATG_player
else
byte_o <= jc_tdo_byte_i;
rst_status_bytes_p_o <= '0';
end if;
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
when others =>
rst_status_bytes_p_o <= '0';
byte_o <= (others => '0');
......
wf_prod_data_lgth_calc.vhd
View file @ d96c6aaa
......@@ -27,7 +27,7 @@ use work.WF_PACKAGE.all; -- definitions of types, constants, entities
--
--
-- Description Calculation of the number of bytes, after the FSS and before the FCS, that have
-- to be transferred when a variable is produced (var_presence, var_identif, var_3).
-- to be transferred when a variable is produced (var_pres, var_identif, var_3, var_jc3).
-- In detail the unit adds:
-- o 1 byte RP_DAT.Control,
-- o 1 byte RP_DAT.Data.PDU_TYPE,
......@@ -178,6 +178,20 @@ begin
end if;
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -
when var_jc3 =>
-- data length calculation regardless of the operational mode, the P3_LGTH and the NOSTAT
-- 1 byte of data from the JTAG_player
-- to these there should be added: 1 byte Control
-- 1 byte PDU_TYPE
-- 1 byte Length
-- 1 byte nFIP status (regardless of the NOSTAT input)
-- 1 byte MPS status
-- 6 bytes (counting starts from 0!)
s_prod_data_lgth <= to_unsigned(5, s_prod_data_lgth'length);
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -
when others =>
......
wf_production.vhd
View file @ d96c6aaa
......@@ -193,6 +193,11 @@ entity WF_production is
-- used by: WF_prod_bytes_retriever for the production of a var_identif
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
-- Signals from the WF_jtag_player unit
jc_tdo_byte_i : in std_logic_vector (7 downto 0);
-------------------------------------------------------------------------------------------------
-- OUTPUTS
......@@ -269,6 +274,7 @@ begin
wb_data_i => wb_data_i,
slone_data_i => slone_data_i,
var3_rdy_i => s_var3_rdy,
jc_tdo_byte_i => jc_tdo_byte_i,
-----------------------------------------------
rst_status_bytes_p_o => s_rst_status_bytes_p,
byte_o => byte_o);
......@@ -298,6 +304,7 @@ begin
var3_acc_a_i => var3_acc_a_i,
nfip_status_r_tler_p_i => nfip_status_r_tler_p_i,
rst_status_bytes_p_i => s_rst_status_bytes_p,
var_i => var_i,
-----------------------------------------------
u_cacer_o => u_cacer_o,
u_pacer_o => u_pacer_o,
......
wf_status_bytes_gen.vhd
View file @ d96c6aaa
......@@ -153,6 +153,8 @@ port (
-- Signals from the WF_prod_permit unit
var3_rdy_i : in std_logic; -- variable 3 ready
-- Signal from the WF_engine_control unit
var_i : in t_var; -- variable type that is being treated
-- OUTPUTS
-- nanoFIP User Interface, NON-WISHBONE outputs
......@@ -256,10 +258,10 @@ begin
-- Combinatorial process MPS_byte_Creation: Creation of the MPS byte
-- (nanoFIP functional specification, Table 2)
MPS_byte_Creation: process (slone_i, s_refreshment)
MPS_byte_Creation: process (slone_i, s_refreshment, var_i)
begin
if slone_i='1' then
if slone_i = '1' or var_i = var_jc3 then
mps_status_byte_o (7 downto 3) <= (others => '0');
mps_status_byte_o (c_SIGNIFICANCE_INDEX) <= '1';
mps_status_byte_o (1) <= '0';
......@@ -341,7 +343,7 @@ begin
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
--r_fcser
if (nfip_status_r_fcser_p_i = '1') then
if (nfip_status_r_fcser_p_i = '1' and ((var_i = var_1) or (var_i = var_2) or (var_i = var_jc1) or (var_i = var_rst))) then
s_nFIP_status_byte(c_R_FCSER_INDEX) <= '1';
end if;
......
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